Physical Design Engineer

2 Weeks ago • 2 Years +
Physics Engine

Job Description

The Physical Design Engineer will perform end-to-end physical design implementation of custom IP and SoC designs, from RTL to GDS. This includes synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, and power/noise analysis. The role involves verification and signoff, analyzing results, and optimizing designs for power, frequency, and area, while contributing to methodology improvements.
Must Have:
  • B.Tech with 3+ years or M.Tech with 2+ years of hands-on experience with end-to-end SD flow (synthesis to GDS).
  • Proficiency with industry standard EDA tools.
  • Good understanding of timing methodology and constraints building.
  • Experience in floorplanning concepts and hierarchical design integration.
  • Good understanding and experience with multiple power domains designs.
  • Hands-on experience with LV flow and cleanup.

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Job Details:

Job Description:

Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis. Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking. Analyzes results and makes recommendations to fix violations for current and future product architecture. Possesses expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools. Optimizes design to improve productlevel parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation.

Qualifications:

Qualifications: B.Tech with 3+ years or M.Tech with 2+ Years of hands-on experience with end-to-end SD flow - synthesis to GDS using industry standard EDA tool, with a proven track record of successful projects. Has good understanding on timing methodology, constraints building etc. Experience in floorplaning concepts and actual work, and integration of hierarchical design Good understanding and experience with multiple power domains designs. Have hands on experience on LV flow and clean up.

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Additional Locations:

Business group:

The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

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