Analog Layout Engineer Intern

25 Minutes ago • Upto 1 Years
Network Engineering

Job Description

Join Marvell's Central Engineering as an Analog Layout Engineer Intern in Pavia, Italy. You will contribute to developing cutting-edge semiconductor solutions, learning IC layout development CAD and physical verification tools, and mastering mask/layout design using Cadence Virtuoso EXL/Custom Compiler Synopsys. This role involves working with advanced CMOS technology nodes (16nm to 3nm), running DRC/LVS checks, and optimizing layout designs for area and parasitic R,C. You will collaborate with a talented team, gaining exposure to various IC design engineering skills and tools.
Good To Have:
  • Specialized coursework in analog design or layout, either as part of your Electronic Engineering degree, summer courses, or conference courses.
Must Have:
  • Student of Electronics or a similar technical field, enrolled at an accredited Italian university OR a Bachelor/Master recent graduate (graduated in the last 12 months).
  • Fundamental understanding of base electronic concepts, likely acquired through a degree in Electronics Engineering or similar technical field.
  • Understand circuit elements like diode, transistor, capacitor, and resistor.
  • Understand basic digital fundamentals: latches, flip-flops, and combinatorial logic.
  • Excellent communication skills to give status updates, present to global teams, and share information.
  • Fluency in English and enough Italian.
  • Eligible to work in the country of hire without restrictions.
Perks:
  • Competitive compensation
  • Great benefits
  • Workstyle within an environment of shared collaboration, transparency, and inclusivity
  • Tools and resources needed to succeed
  • Opportunity to grow and develop

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About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Storage, Security, and Networking. You’ll be part of a small analog team making a big impact on this organization. Additionally, Marvell has the perfect size and scale for you to learn several aspects of engineering that will be new to you, but also have the time and freedom to dive deep into the details of your specialization on most projects. The successful candidate will be self-motivated, willing to learn exciting new technologies, and be able to work effectively within a talented group of individuals. You will gain exposure to a variety of IC design engineering skills and tools during your internship. The Internship would be for a duration of up to 6 months and will take place in our Pavia office.

What You Can Expect

  • Learn the use of all the different IC layout development CAD and physical verification tools.
  • Train on Mask/layout design using Cadence Virtuoso EXL/Custom Compiler Synopsys using circuit design as input.
  • Learn design rules of advanced CMOS technology nodes (16nm to 3nm).
  • Run DRC/LVS checks.
  • Learn Electromigration/IR drop (EMIR) concepts for analog IC layout.
  • Optimize layout designs in terms of area and parasitic R,C.
  • Work with team and collaborate effectively with people for effective outcomes.
  • Have routine meetings with your technical mentor when you have questions, as well as the layout team and the project team where you may have to speak to the entire group and update them about your progress. You may have to present a particular issue or solution you’ve encountered. We are developing brand new cutting-edge technologies here, so we learn new things frequently and share with our colleagues.

What We're Looking For

  • Student of Electronics or a similar technical field, enrolled at an accredited Italian university OR a Bachelor/Master recent graduate (graduated in the last 12 months).
  • Must have a fundamental understanding of base electronic concepts, likely acquired through a degree in Electronics Engineering (graduate or undergraduate) or similar technical field.
  • Having some specialized coursework in analog design or layout, either as part of your Electronic Engineering degree, summer courses, or conference courses, is a valuable skill.
  • Must understand circuit elements like diode, transistor, capacitor, and resistor—basic digital fundamentals: latches, flip-flops, and combinatorial logic.
  • Must have excellent communication skills to give status updates to your team, present to global teams in different time zones, and share information with various levels of personnel at Marvell.
  • Must have fluency in English and enough Italian.
  • Must be eligible to work in the country of hire without restrictions.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews. Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

Export Control Notice

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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