GPU SOC Design Engineer

Develops logic design, RTL coding, and simulation for graphics IPs (graphics, compute, display, media) for full chip integration. Defines architecture and microarchitecture features, optimizes logic for power, performance, area, and timing. Drives unit-level verification, resolves RTL test failures, and supports SoC customers for high-quality GPU block integration.

Must Have

• 6+ years of relevant industry experience
• Multiple tape-outs reaching production with first pass silicon
• Ability to drive and improve digital design methodology
• Hands-on experience with FPGA emulation, silicon bring-up, characterization, and debug
• Experience working in GPU/CPU domain
• Good understanding of verilog and system verilog, synthesizable RTL
• Knowledgeable in modern design techniques, energy-efficient/low power logic design, and power analysis

Perks & Benefits

• Hybrid work model

Job Description:

• Develops the logic design, register transfer level (RTL) coding, and simulation for graphics IPs (including graphics, compute, display, and media) required to generate cell libraries, functional units, and the GPU IP block for integration in full chip designs.
• Participates in the definition of architecture and microarchitecture features of the block being designed.
• Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
• Reviews the verification plan and implementation to ensure design features are verified correctly across verification hierarchies, drives unit level verification, and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
• Supports SoC customers to ensure high quality integration of the GPU block.

Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

• B.Tech/M.Tech +6 Years of relevant industry experience.
• Having achieved multiple tape-outs reaching production with first pass silicon.
• Ability to drive and improve digital design methodology to achieve high quality first silicon.
• Hands on experience with FPGA emulation, silicon bring-up, characterization and debug.
• Have experience working in GPU/CPU domain.
• Able to work with multi-functional teams within Intel and external vendors across geographical boundaries to resolve architectural and implementation challenges with a focus on schedule.
• Strong verbal and written communication skills.
• Good understanding of verilog and system verilog, synthesizable RTL.
• Knowledgeable in modern design techniques and energy-efficient/low power logic design and power analysis.
• Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.