Memory System Designer and Place and Route Engineer

1 Month ago • 2 Years + • $73,000 PA - $117,000 PA

Design

Job Description

We are looking for an energetic and passionate design engineer to join our Central Engineering Group and be part of a memory subsystem design team responsible for the development of large memory blocks and subsystems. Key responsibilities include architecting and designing memory subsystems, implementing RTL, performing place and route, ensuring design closure (timing, DRC, LVS, EM/IR), and gate netlist synthesis.

Must Have:

Architect and design memory subsystems
Implement RTL of subsystem designs
Place and route (physical design)
Design closure: timing, DRC, LVS, EM/IR, etc.
Gate netlist synthesis

Perks:

Medical plans
dental plans
vision plans
401(K) participation including company matching
Employee Stock Purchase Program (ESPP)
Employee Assistance Program (EAP)
company paid holidays
paid sick leave
vacation time
Paid Family Leave and other leaves of absence

Add these skills to join the top 1% applicants for this job

team-management

problem-solving

communication

game-texts

python

Job Description:

Job Responsibilities

Architect and design memory subsystems
Implement RTL of subsystem designs
Place and route (physical design)
Design closure: timing, DRC, LVS, EM/IR, etc.
Gate netlist synthesis

Skill Set Required

Strong design skills
Ability to write and debug Verilog RTL code
Place and route experience
Experience with STA, DRC, EM/IR tools, and attaining design closure
Ability to code in Python
Understanding of synthesis tools and running synthesis
Capable of running and debugging logical equivalency checkers
Familiar with memory behavior
Proficient in writing automation scripts, and tools savvy
Good communication, interpersonal, and leadership skills
Motivated, self-driven, and good at multitasking

Education & Experience

Bachelor's degree and a minimum of two (2) years of relevant experience.

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $73,000 - $117,000

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Welcome! Thank you for your interest in Broadcom!

We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.

For more information please visit our video library and check out our Connected by Broadcom series.

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