IC Verification Engineer

14 Minutes ago • 6 Years +

Quality Assurance

Job Description

The IC Verification Engineer will develop test plans and functional coverage for Block/Core/SOC features, architect and build scalable, reusable testbenches, and create pseudo-random tests. Responsibilities include debugging regression failures, analyzing functional coverage gaps, and documenting verification strategies. The role requires expertise in System Verilog, UVM/VMM/OVM, and strong OOP principles, with 6-8+ years of experience in verification.

Good To Have:

A good understanding of a complex protocol like PCIe or other multi-layered protocol
Knowledge of PCI Express protocol

Must Have:

Develop test plans and functional coverage for Block/Core/SOC features
Architect and develop scalable, reusable testbenches using verification methodology
Build pseudo-random tests for full functional coverage
Debug regression failures and analyze functional coverage gaps
Document verification strategy and lead reviews
Drive improvements in verification quality and efficiency
Experience writing and debugging complex test benches
Strong understanding of verification aspects: Testbenches, Test plans, pseudo-random tests, Functional coverage
Proficiency in System Verilog and UVM/VMM/OVM Verification Methodologies
Excellent command over fundamental Object-Oriented Programming (OOP) principles

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Job Description:

Job duties include:

Develop Test plans for all features for Block/Core/SOC and Write Functional coverage for these features.
Architect and develop scalable and re-usable testbenches, using the framework of the verification methodology
Build pseudo-random tests to verify and get to full Functional coverage
Debug Regression failures, analyze Functional Coverage gaps and improve tests to cover the gaps
Document verification strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design/architecture.
Drive improvements in Verification in terms of quality and efficiency.

Requirements:

Bachelor's degree in Electrical Engineering or related degree and 8+ years related experience or Master's degree in Electrical Engineering or related degree and 6+ years related experience
Experience writing and debugging complex test benches
Must have a good understanding of all aspects of Verification from building Testbenches, developing Test plans and pseudo-random tests, Functional coverage.
Must have proficiency in System Verilog and Verification Methodologies like UVM/VMM/OVM
Should have exceptionally good command over fundamental OOP principles.
A good understanding of a complex protocol like PCIe or other multi-layered protocol will be a plus
Capability to work independently and deliver.
Knowledge of PCI Express protocol preferred

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Welcome! Thank you for your interest in Broadcom!

We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.

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