VLSI Technical Engineer

broadcom

Job Summary

Broadcom is seeking a VLSI Technical Engineer with strong knowledge and working experience in IP/Subsystem/SoC verification. The role requires expertise in developing verification environments using System Verilog and UVM, creating BFMs, checkers, monitors, and scoreboards. Candidates must be capable of developing block/system level verification plans, debugging test failures, and working with code/functional coverage and constrained random verification. Familiarity with Ethernet, PCIe, HBM, CPU, SoC domains, Gate-level/SDF simulations, and scripting languages like Perl/Tcl is essential. The position requires flexibility to work on various IP/Subsystem/SoC projects.

Must Have

  • Strong knowledge and working experience in IP / Subsystem/ SoC verification
  • Expertise to develop verification environments using System Verilog and UVM
  • Expertise to develop BFMs / Checkers / monitors / Scoreboards
  • Developed block/system level verification plans and tests
  • Capability to debug test failures to find the root cause
  • Worked on code / functional coverage
  • Experience in constrained random verification
  • Domain skills: Ethernet/PCIe/HBM/CPU/SoC
  • Gate-level /SDF simulations
  • Education Qualification: Bachelors/Master’s in Electronics/Computer Engg

Good to Have

  • Knowledge of scripting languages like Perl, Tcl
  • Flexible to work in any IP/Subsystem/SoC projects
  • Experience with CAD Tools: Cadence/Synopsys

Job Description

He/she should have strong knowledge of following

  • Working experience in IP / Subsystem/ SoC verification
  • Expertise to develop verification environments using System Verilog and UVM
  • Expertise to develop BFMs / Checkers / monitors / Scoreboards
  • Must have developed block/system level verification plans and tests.
  • Must have capability to debug test failures to find the root cause.
  • Must have worked on code / functional coverage.
  • Experience in constrained random verification.
  • Domain skills: Ethernet/PCIe/HBM/CPU/SoC
  • Gate-level /SDF simulations
  • Knowledge of scripting languages like Perl, Tcl
  • Flexible to work in any IP/Subsystem/SoC projects

CAD Tools: Cadence/Synopsys

Education Qualification: Bachelors/Master’s in Electronics/Computer Engg

3 Skills Required For This Role

Cad Computer Aided Design Game Texts Perl

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