Mixed-Signal Circuit Design Engineer - New College Graduate

NVIDIA

| Taipei City, Taiwan (On Site) | Full Time | 8 months ago

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Job Summary

NVIDIA seeks a Mixed-Signal Circuit Design Engineer to join their team developing high-speed chip interfaces and complex analog functions for GPUs and SoCs (Tegra). Responsibilities include designing state-of-the-art mixed-signal circuits in deep sub-micron CMOS technologies, collaborating with layout engineers, debugging and characterizing designs, and supporting high-volume production. The ideal candidate will have an MSEE or PhD in Electrical Engineering and a proven understanding of analog circuit layout in submicron CMOS. Experience with various interfaces (HDMI, LVDS, etc.), PLL techniques, high-speed serial links, and ADC is highly valued. Proficiency in scripting languages (Perl, Python) and Cadence IC design tools is essential.

Must Have

MSEE/PhD in Electrical Engineering
Analog circuit layout expertise in submicron CMOS
Proficiency in Cadence design tools
Experience with HSpice, Finesim, XA
High-speed interface design experience

Good to Have

Experience with digital links (HDMI, MIPI, etc.)
PLL design experience
ADC design experience
Scripting proficiency (Perl, Python)
DRC/LVS verification experience

Job Description

We are looking for a Mixed-Signal / Analog Circuit Designer – someone who is excited to join a growing group of diverse individuals responsible for handling challenging high-speed mixed-signal circuit designs. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence.

What you'll be doing:

You will be part of an analog team developing high-speed chip interfaces and complex analog functions that enable our graphics processing units (GPU) and SoC products (Tegra)
Design state-of-the-art mixed-signal circuits in deep sub-micron CMOS technologies.
Work closely with physical/layout engineers to floorplan and implement physical design of these functions.
Support debug, characterization and support product through high-volume production.

What we need to see:

MSEE or PhD in Electrical Engineering.
Proven understanding of analog circuit layout concepts in submicron CMOS technologies
You have interests in more than one of the following areas: digital links for display interfaces (such as HDMI, LVDS, DVI, MIPI PHY, Display Port), USB, low-jitter clock synthesis using PLL techniques, IO pads, high-speed serial links, and ADC.
Able to communicate in spoken and written English
Work effectively in a team, good communication skills, enthusiasm and positive energy.
Proficiency in scripting languages like perl, python, skill etc.
Experience with design and verification tools (Cadence's IC design environment, analog circuit simulation tools like HSpice, Finesim, XA)
You are an expert with Cadence custom circuit design tools - particularly virtuoso
Experience running and debugging DRC and LVS with verification tools
If you have the dream to learn and explore new technologies and have good analytical skills, this is the ideal position for you.

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.

We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.