Lead physical design of CPUs for Google Cloud, working with a team to deliver custom silicon solutions. Responsibilities include leading the physical design process to tape-out, developing physical design methodologies for System on a Chip (SoC) flows, collaborating with architects and logic designers on design feasibility and tradeoffs, and managing projects from concept to volume production. Requires expertise in advanced design techniques (clock/voltage domain crossing, DFT, low power), high-performance/high-frequency design, and VLSI design. Experience with System Verilog and TCL scripting is preferred.
Good To Have:- VLSI design experience in SoC or ASIC
- System Verilog and TCL scripting
- Layout verification and design rule experience
Must Have:- Bachelor's degree in EE or equivalent
- SoC design experience
- Advanced design experience (clock/voltage, DFT, low power)
- High-performance, high-frequency, low-power design expertise
- Lead physical design to tape-out
- Develop SoC physical design methodologies