Principal Design Engineer

As a Principal Design Engineer at Cadence, you will lead physical design tasks at various levels, including subsystem, sub-chip, and full-chip. Your responsibilities will involve Synthesis, Floorplanning, Power planning, Placement, CTS, Routing, Timing analysis, Physical Verification, and more. You will need leadership skills, project management experience and should be able to lead teams. The role requires expertise in physical design flow from RTL to GDSII and proficiency in TCL and Perl scripting. This role is important to ensure customer success. Cadence values its employees with friendly policies that focus on physical and mental well-being.

Must Have

• Expertise in PnR tools (Innovus, ICC2)
• Proficiency in STA (Tempus, Primetime)
• Physical design flow experience
• Proficiency in TCL and Perl scripting
• M.Tech/B.Tech or equivalent

Perks & Benefits

• Opportunities to work on cutting-edge technology
• Employee-friendly policies focusing on well-being and development
• Collaborative "One Cadence - One Team" culture
• Multiple avenues for learning and development
• Work with a diverse team

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

The Cadence Advantage

• The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
• Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
• The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success
• Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests
• You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day.

Requirement:

•   Physical design Lead Engineer

Will be responsible for Physical Design tasks at subsystem, sub-chip, and/or full-chip level.  The tasks will include Synthesis, Floorplanning, Power planning, Placement, CTS and custom clocking, Routing, Static Timing analysis, Physical Verification, Formal Equivalency, IREM analysis. Expertise in FullChip tasks is added advantage. Should have leadership skills , leading team , handling flat projects.

•   PnR tools (Innovus, ICC2) STA (Tempus, Primetime)
•  7+ years

Expertise in:  Physical design flow from RTL to GDSII

Mandatory skills:  Proficiency in TCL, Perl scripting

•  M.Tech/B.Tech (Or) equivalent graduation
• Hyderabad

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