Principal Design Engineer
Job Summary
Job Description
Cadence seeks a Principal Design Engineer with deep knowledge of high-speed Serdes/Memory interfaces (PCIe Gen3/4/5, GDDRx/DDRx/LPDDRx) and strong Analog/I/O design fundamentals. Experience in leading and mentoring junior engineers is essential. Prior experience on cutting-edge technology nodes (16nm/10nm/12nm/7nm) is a plus.
Must have:
- Serdes/Memory Interfaces
- Analog Design
- I/O Design
- Leading Engineers
Good to have:
- PCIe Gen3/4/5
- GDDRx/DDRx/LPDDRx
- ESD/Reliability/SI/PI
- Cutting-Edge Nodes
Job Details
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Education: BE/ B Tech/ ME/ M Tech / MS
- In-depth understanding of high-speed Serdes/Memory interface circuits like I/O’s,PLL’s, Clocking, Datapaths.
- Hands on experience on PCIe Gen3/4/5, GDDRx/DDRx/LPDDRx Serdes and memory interface circuits.
- Strong Analog Design and I/O Design fundamentals. Knowledge of ESD/Reliability/SI/PI.
- Experience in leading and mentoring Junior Engineers.
- Must have excellent written and verbal communication skills as well as good problem-solving skills.
- Prior experience of working on cutting edge technology nodes like 16nm/10nm/12nm/7nm is added advantage.
We’re doing work that matters. Help us solve what others can’t.
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About The Company
Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For.
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