Introduction:
Work with Cadence’s global silicon solutions teams who design semiconductor IP for the top electronic product companies in the world, in leading edge semiconductor processes, and using the latest industry tools and methodologies. As a Technical Quality Engineer, you will work with the design teams, engineering management, CAD, and methodology teams to help ensure that we are constantly improving our processes and are delivering the highest quality product to our customers.
Location:
On-site in the Shanghai, Beijing, or Nanjing design centers.
Requirements:
Education: MSEE
Experience: 5+ years
Hands-on experience in one or more areas of analog or digital IC design or verification, or experience in silicon fabrication quality assurance/control.
Experience in defect management and analysis processes such as RCA, 5Why, 8D is a plus.
Fluency in English and Mandarin
Strong communication skills, strong quality consciousness and sense of responsibility.
Strong problem analysis and teamwork skills.
Responsibilities:
Actively participate on the global IP Quality Team.
Represent the Cadence Quality Team to customers and partners.
Work across the global organization to implement improvements to flows and procedures.
Define and maintain quality procedures for multiple design teams.
Generate, maintain, and interpret quality metrics.
Perform Root-Cause-Analysis and identify Corrective Actions.
Hold Post-Mortem reviews and summarize and communicate results.
Assist design teams in preparation of Failure Analysis reports.
Maintain quality certifications such ISO9001 and ISO26262.
Support participation in external semiconductor foundry quality programs.
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