Job Description:

Defines, develops, and performs functional validation for integrated SoCs, focusing on validation of IP integration, interaction between IPs, and systemlevel features. Applies various hardware and software level tools and techniques to ensure validation coverage and that performance, power, and area goals are met. Reviews proposed design changes to assess impact on validation plans, tasks, and timelines. Develops SoC validation methodologies, validation test plans, executes validation plans, and collaborates with other engineers for design optimization, troubleshooting, and failure analysis. Performs silicon debug to identify root causes and resolves all functional and triage failures for SoC issues. Tests interactions between various SoC features using validation infrastructure. Develops postsilicon validation infrastructure (e.g., performance monitors, behavioral checkers, state space coverage) and test environment used in validation testing. Publishes SoC validation reports summarizing all validation activities performed, reviews results, and communicates to relevant teams. Works with architecture, design, verification, board, platform, and manufacturing teams to maintain and improve debug, validation test strategy, methodologies, and processes for SoC interfaces and to meet desired product specifications. Develops content to create or increase specific IP interactions using a variety of tools and techniques (including patching techniques using microcode, firmware, or custom OS builds). Engages in all phases of the product life cycle and develops and validates content, infrastructure, and bug hunts in multiple environments (e.g., simulation, emulation, FPGAs) to ensure silicon readiness.

Qualifications:

• Bachelor's/Master's in Hardware Engineering /Electronics Engineering /Computer Engineering or Computer Science with minimum 6 years to 10 years (Domain Lead position) of related work experience.
• Candidate Must have high degree of Hardware architecture/ microarchitecture experience in CPU/SoC/Chipset/and one of the subsystems areas given below
• Must have [in any one or more domains]
• Deep understanding in one or more protocols from PCIe Express, USB3, DP, Bare metal
• Expertise hands on with programming languages C, C++, Python & Expert understanding Data Structures.
• Good To have Firmware development & validation experience
• Good to have Type C, Thunderbolt [TBT3/ USB4 and USB5] knowledge.
• Excellent written and oral communications and experience working in a cross functional team environment are essential.
• Good Team Player.
• Processes strong problem solving, analytical and debug skills.

Added advantage

• Good working knowledge in C++/Python SW programming for content development and scripting.
• Knowledge of IA/ARM core and system level Power Management architecture who familiar in PMC feature, Gate/Chip level power management transition state & etc.
• Understanding of System Reset related Validation expertise is a plus.
• Solid understanding of the Validation and Debug flows of a complex CPU Silicon
• Knowledge on Validation/ Debug Flows and overall SOC Architecture.
• Pre-silicon Design / Validation knowledge is a value added.

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Additional Locations:

Business group:

The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.