Software Architect

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

The Cadence Advantage

• The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
• Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
• The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success
• Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests
• You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day.

Cadence HSV group is responsible for development of the Palladium and Protium emulation hardware and software system. This includes developing design and verification components for complex protocols, to be used for emulation, for e.g. System Verilog/Verilog components and SW components written in C/C++ and SV-UVM. It includes familiarity with one or more protocols related to Ethernet, DDR-5/6, PCIe Gen-6/7, 5G systems, NVMe, ARM or x86 processor architecture.

A critical element of this is performance, both performance of the AVIP, and the underlying hardware-software design/integration including the compiler and the processor-based Palladium emulator hardware system.

Job Description:

We are seeking a skilled HW and/or Software Engineer to build representative SoC designs using partner systems and Cadence design and verification collateral. The main task is to profile the performance of the HW/SW system, identify bottlenecks in Palladium/Protium hardware and software and make recommendations for improvements. The job can also involve development, verification and maintenance of accelerated verification IP for emulation, for standard communication protocols. Experience with SoC design, verification and performance analysis is desired.

It will also involve coordination with different teams within Cadence – Development, Marketing, Field, etc. and with our customers.

Skills needed:

• 15+ years of hands-on HW development experience &on hands-on HW verification experience
• Knowledge and experience in Verilog/System Verilog.
• Knowledge with design/integration of SoC systems
• Experience with deep performance analysis of complex hardware-software systems.
• Well versed in object-oriented design, System-C/C/C++ programming experience is a plus
• Familiarity with standard communication protocols
• Familiarity with OS/Firmware/QEMU would be an advantage
• Emulation experience on Palladium/Protium would be a plus
• Good communication skills, excellent inter-personal skills, motivated individual
• Ability to analyze and propose solutions to complex problems.

Behavioral skills required:

• Must possess strong written, verbal and presentation skills.
• Good communication and interpersonal skills, demonstrate teamwork and collaboration skills.
• Ability to establish a close working relationship with both customer peers and management.
• Explore what’s possible to get the job done, including creative use of unconventional solutions
• Work effectively across functions and geographies
• Push to raise the bar while always operating with integrity

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