Electrical Validation Engineer

31 Minutes ago • 3 Years +

Quality Assurance

Job Description

Defines, develops, and performs functional validation for integrated SoCs, focusing on validation of IP integration, interaction between IPs, and system-level features. Applies various hardware and software level tools and techniques to ensure validation coverage and that performance, power, and area goals are met. Develops SoC validation methodologies, test plans, executes them, and collaborates for design optimization, troubleshooting, and failure analysis. Performs silicon debug, tests interactions, and develops post-silicon validation infrastructure. Publishes validation reports and works with various teams to improve debug and validation processes.

Must Have:

Define, develop, and perform functional validation for integrated SoCs.
Validate IP integration, interaction between IPs, and system-level features.
Apply hardware/software tools for validation coverage, performance, power, and area goals.
Develop and execute SoC validation methodologies and test plans.
Collaborate for design optimization, troubleshooting, and failure analysis.
Perform silicon debug to identify root causes and resolve functional failures.
Test interactions between SoC features using validation infrastructure.
Develop post-silicon validation infrastructure and test environments.
Publish SoC validation reports and communicate results to teams.
Work with architecture, design, verification, board, platform, and manufacturing teams.
Develop content for specific IP interactions using various techniques.
Engage in all product life cycle phases for silicon readiness.
3 years experience in post-silicon electrical validation.
Knowledge of electrical test equipment: BERT, Scopes, Network Analyzers.

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Job Description:

Defines, develops, and performs functional validation for integrated SoCs, focusing on validation of IP integration, interaction between IPs, and systemlevel features. Applies various hardware and software level tools and techniques to ensure validation coverage and that performance, power, and area goals are met. Reviews proposed design changes to assess impact on validation plans, tasks, and timelines. Develops SoC validation methodologies, validation test plans, executes validation plans, and collaborates with other engineers for design optimization, troubleshooting, and failure analysis. Performs silicon debug to identify root causes and resolves all functional and triage failures for SoC issues. Tests interactions between various SoC features using validation infrastructure. Develops postsilicon validation infrastructure (e.g., performance monitors, behavioral checkers, state space coverage) and test environment used in validation testing. Publishes SoC validation reports summarizing all validation activities performed, reviews results, and communicates to relevant teams. Works with architecture, design, verification, board, platform, and manufacturing teams to maintain and improve debug, validation test strategy, methodologies, and processes for SoC interfaces and to meet desired product specifications. Develops content to create or increase specific IP interactions using a variety of tools and techniques (including patching techniques using microcode, firmware, or custom OS builds). Engages in all phases of the product life cycle and develops and validates content, infrastructure, and bug hunts in multiple environments (e.g., simulation, emulation, FPGAs) to ensure silicon readiness.