Role: Design of SRAM/RFcustom/compiler memories in 3nm/5nm/7FF technologies.
Exp: 5 – 15 Years Responsibilities: SRAM architecture and design; SRAM design to meet yield target, bitcell characterization; advanced circuit design experiences like write/read assist; SRAM characterization flow setup; SRAM deliverables, QA and release process,
Skills needed: EDA tools like Cadence Virtuoso, simulation tools finsim, hspice and xa-ra. Design validation tools solido and MC analysis, Very good debug skill, problem solving and logical reasoning skills. Good communication skills. Should be flexible with work hours and hard working. Good in scripting to analyze large data and summarize. Quick ramp up with new tools and flows.
A global infrastructure technology leader built on more than 60 years of innovation, collaboration and engineering excellence.
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