RTL Design (Peripherals)-Sr Lead

12 Hours ago • 4-8 Years

Programming

Job Description

This Senior Lead RTL Design position at Qualcomm India Private Limited in Bangalore involves independent work on peripheral IPs, including designing microarchitecture solutions and guiding junior team members. The role requires driving projects independently, engaging with external teams, and potentially making schedule estimates. Key responsibilities include collaborating with SoC verification and validation teams for pre/post Silicon debug. The ideal candidate will have 4-8 years of experience in ASIC IP core design, with expertise in low power, multi-clock, and asynchronous interface designs, as well as proficiency with ASIC development tools.

Good To Have:

Ability to make schedule estimates
People management experience
Knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB/PCIE/Ethernet
Understanding of constraint development and timing closure
Experience in Synthesis / Understanding of timing concepts
Experience in System Verilog, Verilog, C/C++, Perl and Python
Ability to lead a small design team

Must Have:

Work independently on one of the peripheral IP’s
Come up with design and microarchitecture solutions
Guide/mentor juniors
Engage with external teams to drive/resolve cross team dependencies
Take complete responsibility of one or more projects and drive them independently
4-8 years of work experience in ASIC IP cores design
Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience (or Master's/PhD with less experience)
Hands-on experience in Low power design
Hands-on experience in Multi Clock designs, Asynchronous interface
Experience in using ASIC development tools such as Lint, CDC, Design compiler and Primetime
Strong experience in micro architecting RTL design from high level design specification
Excellent problem solving skills, strong communication and team work skills

Perks:

World-class health benefit option providing world-class coverage to employees and their eligible dependents
Programs designed to help employees build and prepare for a financially secure future
Self and family resources to build emotional/mental strength and resilience, and define purpose
Wellbeing programs and resources to support Live+Well and Work+Well
Continuous learning and development programs
Tuition reimbursement
Mentorships

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Job Description

Responsibilities will include

To be strong designer who is able to work independent on one of the peripheral IP’s
come up with design and microarchitecture solutions
guide/mentor juniors
engage with external teams to drive/resolve cross team dependencies.
Take complete responsibility of one or more project and drive that independently.
Being able to make schedule estimates is a plus.
People management experience is a plus

Skills & Requirements needed

4-8 years of work experience in ASIC IP cores design
Required: Bachelor's, Electrical Engineering Preferred: Master's, Electrical Engineering
Knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB/PCIE/Ethernet preferred.
Work closely with the SoC verification and validation teams for pre/post Silicon debug
Hands on experience in Low power design is required
Hands on experience in Multi Clock designs, Asynchronous interface is a must.
Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required.
Understanding of constraint development and timing closure is a plus.
Experience in Synthesis / Understanding of timing concepts is a plus.
Strong experience in micro architecting RTL design from high level design specification.
Excellent problem solving skills, strong communication and team work skills are mandatory.
Self-driven, needs to work with minimum supervision.
Experience in System Verilog, Verilog, C/C++, Perl and Python is a plus
Ability to lead a small design team.

Minimum Qualifications:

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.