Positions are open for full-time in the areas of DFT design from unit level to chip level, involving all aspects of DFT design functions from scan, MBIST, to ATPG. Roles in the areas of CPU and SOC DFT design and verification. Responsibilities include defining DFT strategy and methodologies, designing DFT features, defining test structures, debug structures, and test plans, creating test vectors or overseeing their creation, collaborating with the physical design team to close requirements, validating DFT requirements, working with designers to increase test coverage, debug observability and flexibility, verifying post-PD designs meet DFT requirements, and working with verification engineers, stepping in to do run tests when needed.