SOC Design Engineer – Physical design and Integration

19 Minutes ago • 1 Years + • System Design • $104,890 PA - $148,080 PA

Job Summary

Job Description

Intel is seeking a SOC Design Engineer for physical design and integration of custom CPU designs. This role involves performing physical design implementation from RTL to GDS, including synthesis, place and route, clock tree synthesis, and static timing analysis. The engineer will also conduct verification and signoff, analyze results to improve microarchitectures, and collaborate with various teams. Key responsibilities include optimizing CPU design for power, frequency, and area, and contributing to methodology and flow automation.
Must have:
  • Performs physical design implementation of custom CPU designs from RTL to GDS.
  • Conducts all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
  • Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.
  • Analyzes results and makes recommendations to improve current and future CPU microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams.
  • Possesses CPU specific expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT.
  • Works intimately with industry EDA vendors to build and enhance tool capabilities to design a highspeed, low power synthesizable CPU.
  • Optimizes CPU design to improve product level parameters such as power, frequency, and area.
  • Participates in the development and improvement of physical design methodologies and flow automation.
  • Bachelor's Degree in Electrical Engineering, Computer Engineering, or a related field with 1+ years of experience or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
  • Experience in physical synthesis, place and route, and clock tree synthesis with Synopsys or Cadence tools.
  • Static timing analysis constraint understanding and generation, clock stamping, and timing closure.
  • Multiple Power Domain analysis using standard Power Formats UPF or CPF.
Good to have:
  • Experience with physical design using industry EDA tools
  • Experience in backend design and/or integration
  • Product development and delivery on leading edge process nodes
  • Experience in Python/Perl/TCL programming languages
Perks:
  • Competitive pay
  • Stock
  • Bonuses
  • Health benefits
  • Retirement benefits
  • Vacation

Job Details

Job Description:

Do Something Wonderful!

Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow.

Want to learn more? Visit our YouTube Channel or the links below!

Key Responsibilities but not limited to

  • Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing.
  • Conducts all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
  • Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.
  • Analyzes results and makes recommendations to improve current and future CPU microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams.
  • Possesses CPU specific expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT.
  • Works intimately with industry EDA vendors to build and enhance tool capabilities to design a highspeed, low power synthesizable CPU.
  • Optimizes CPU design to improve product level parameters such as power, frequency, and area.
  • Participates in the development and improvement of physical design methodologies and flow automation.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Bachelor's Degree in Electrical Engineering, Computer Engineering, or a related field with 1+ years of experience or Master's degree in Electrical Engineering, Computer Engineering, or a related field

Related work experience should be of the following:

  • Physical synthesis, place and route, and clock tree synthesis with Synopsys or Cadence tools.
  • Static timing analysis constraint understanding and generation, clock stamping, and timing closure.
  • Multiple Power Domain analysis using standard Power Formats UPF or CPF

Preferred Qualifications:

  • Experience with physical design using industry EDA tools
  • Experience in backend design and/or integration
  • Product development and delivery on leading edge process nodes
  • Experience in Python/Perl/TCL programming languages

Job Type:

College Grad

Shift:

Shift 1 (United States of America)

Primary Location:

US, Oregon, Hillsboro

Additional Locations:

Business group:

The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003

Annual Salary Range for jobs which could be performed in the US:

$104,890.00-$148,080.00

Salary range dependent on a number of factors including location and experience.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

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About The Company

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