Chip Architect - ARM-based SoC Design (Sensing & Touch, Ultra-Low Power)

Broadcom is seeking a highly skilled and experienced Chip Architect to define and document next-generation ARM-based Systems-on-Chip (SoCs). This role focuses on bridging system requirements with silicon implementation, emphasizing mixed-signal integration for sensing and touch interfaces under stringent low-power constraints. The ideal candidate will be a hands-on leader, driving technical specifications, conducting power and performance analyses, and serving as the primary architectural liaison across diverse engineering teams. Strong RTL and scripting knowledge is essential for this role.

Must Have

• Lead definition and documentation of next-generation ARM-based SoCs.
• Bridge system requirements and silicon implementation with focus on mixed-signal integration for sensing and touch.
• Drive detailed technical specifications and conduct rigorous power and performance analyses.
• Serve as primary architectural liaison across diverse engineering teams.
• Lead comprehensive power and bandwidth analysis for architectural trade-offs.
• Develop models to predict system performance and power consumption (uW/MHz).
• Create and maintain detailed chip specification documentation.
• Define and drive the top-level architecture for complex SoCs utilizing various ARM processor cores.
• Serve as the mandatory interface point and technical lead across Firmware, Digital/Analog Design, Systems, and Analog teams.
• Architect seamless integration of mixed-signal components for advanced sensing and touch applications.
• Champion ultra-low-power design methodologies and architectural choices.
• Bachelor’s with 12+ years or Master’s with 10+ years of related experience.
• Proven track record of successful SoC tape-outs.
• Deep expertise in ARM architectures and system IP (interconnects, memory systems).
• Proven experience conducting rigorous power (static/dynamic) and bandwidth analysis.
• Strong understanding of mixed-signal integration challenges and design principles.
• Excellent technical writing skills with meticulous attention to detail.
• Exceptional communication, leadership, and negotiation skills.
• Must be present at the office location (on-site requirement).

Good to Have

• Touch Sensors
• Mixed Signal SOC architecture
• FPGA knowledge is a plus
• Low power Architecture as applied to DSP
• Technical Customer engagement

Perks & Benefits

• discretionary annual bonus
• equity
• Medical plans
• dental plans
• vision plans
• 401(K) participation including company matching
• Employee Stock Purchase Program (ESPP)
• Employee Assistance Program (EAP)
• company paid holidays
• paid sick leave
• vacation time
• Paid Family Leave

We are seeking a highly skilled and experienced Chip Architect to lead the definition and documentation of next-generation ARM-based Systems-on-Chip (SoCs). This role is central to bridging the gap between system requirements and silicon implementation, with a strong focus on mixed-signal integration for sensing and touch interfaces within stringent low-power and bandwidth constraints. The ideal candidate must be a hands-on leader capable of driving detailed technical specifications, conducting rigorous power and performance analyses, and serving as the primary architectural liaison across diverse engineering teams. Strong hands-on RTL and scripting knowledge is a must.

Key Responsibilities

• Bandwidth & Power Analysis: Lead comprehensive power and bandwidth analysis for architectural trade-offs. Develop models to predict system performance and power consumption (uW/MHz) and make data-driven decisions to optimize the SoC PPA (Power, Performance, Area).
• Detailed Chip Specification: Create and maintain detailed chip specification documentation, including detailed architecture descriptions, relevant block diagrams, timing diagrams, and expected waveforms to guide implementation and verification teams. Working knowledge of AXI, AMBA, Serial interfaces and memory.
• ARM-based SoC Architecture: Define and drive the top-level architecture for complex SoCs utilizing various ARM processor cores (Cortex-M, Cortex-A, etc.) and associated system IP.
• Cross-Functional Interface: Serve as the mandatory interface point and technical lead across multiple disciplines:
• Firmware: Ensure the architecture is easily programmable and meets real-time constraints.
• Design (Digital/Analog): Provide clear specifications and support during implementation.
• Systems: Translate high-level use cases into concrete architectural requirements.
• Analog: Define clear interfaces and integration strategies for mixed-signal blocks (ADCs, DACs, sensor interfaces).
• Mixed-Signal Integration: Architect the seamless integration of mixed-signal components tailored for advanced sensing and touch applications.
• Low-Power Leadership: Champion ultra-low-power design methodologies and architectural choices to achieve aggressive battery life targets for portable devices.

Qualifications

• Education: Bachelor’s and 12+ years of related experience, or Master’s degree in Electrical Engineering, Computer Engineering, or a related field and 10+ years of related experience
• Experience: System engineering, or a related field, with a proven track record of successful SoC tape-outs.
• Technical Expertise: Deep expertise in ARM architectures and system IP (interconnects, memory systems). Proven experience conducting rigorous power (static/dynamic) and bandwidth analysis for complex systems. Strong understanding of mixed-signal integration challenges and design principles for sensing/touch applications.
• Documentation Skills: Excellent technical writing skills with meticulous attention to detail in creating specifications, diagrams, and documentation.
• Soft Skills: Exceptional communication, leadership, and negotiation skills. Must be highly effective at driving consensus and clarity across disparate engineering disciplines.
• Work Environment & Location
• On-site Requirement: This is a full-time, hands-on role that requires the employee to be present at the office location. There is no remote work option available.
• Preferred Location: San Jose, CA.
• Secondary Location: Irvine, CA (Candidates willing to relocate or work from our Irvine office may be considered).

Other Desired Experience

• Touch Sensors
• Mixed Signal SOC architecture
• FPGA knowledge is a plus
• Low power Architecture as applied to DSP
• Technical Customer engagement