CMOS Foundry and PDK Engineer, Lead

Job Posting Date

2025-10-24

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Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.

OR

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

OR

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

Job Function: We are seeking a highly skilled and experienced engineer to join our team as a CMOS Foundry & PDK Engineer. This role involves close collaboration with internal design, CAD, yield, and test teams, as well as external foundries, to support RF, analog, and mixed-signal product development. The ideal candidate will have deep expertise in CMOS technologies, circuit design/simulations, PDK development, and tape-out processes.

Responsibilities

• Provide technical support for CMOS PDK issues including DRC, LVS, PEX, EM, and modeling concerns.

• Collaborate with internal design and CAD teams to resolve design-related PDK challenges and ensure robust simulation and layout practices.

Tape-out & IP Validation

• Support tape-out activities including database preparation, mask reviews, and validation of devices/IP in final tape-out databases.

• Ensure compliance with foundry specifications and design rules.

Process & Reliability Support

• Collaborate with test, yield, and design engineers to address fab-related issues for new processes and products.

• Support technology benchmarking and model validation using test IP cores for RFIC and analog applications (e.g., LNA, RF switches, bandgap references).

Cross-functional Collaboration

• Interface with global CAD, design, SQE, YMT, package, and reliability teams to report and resolve issues efficiently. Excellent communication skills needed.
• Work with external IP vendors, fabs, OSATs, and silicon service partners to ensure timely project execution.

Basic Qualifications

• Minimum of 5 years of experience in sub-micron CMOS RF-AMS IP/test structure and layout design, as well as PDK aspects (DRC/LVS/PEX/EM/REL tool) is must.
• Hands on experience with CMOS RF-AMS circuit design and simulation including PEX/EM tools such as Cadence/ Keysight ADS, Calibre XRC, HFSS, RF-Pro, Momentum, etc. Knowledge of Digital design flow is a plus.
• Support technology development, benchmarking, and model validation using test IP cores for RFIC and analog applications (such as LNA, RF switches, bandgap, etc).
• Good understanding of the device and circuit level reliability, safe operating area, and design rules.
• Good communication skills and demonstrated ability to meet deadlines and commitments. Ability to solve problems in time.

Preferred Qualifications

• Experience in hardware description languages like Verilog, VHDL for AMS/digital sims is beneficial.
• Expertise in using statistical analysis tools to find trends. Knowledge of scripting languages like Python, Tcl, JMP, etc is a plus.