Design Automation STA Engineer

This role is for a Design Automation Engineer specializing in Static Timing Analysis (STA) within a world-class semiconductor ASIC provider. The engineer will join a highly skilled team responsible for developing, testing, and enhancing STA methodology and flows to ensure first-time correct ASIC designs. Key responsibilities include working with proven flows, debugging timing constraints, and generating timing reports.

Must Have

• BS Electrical/Computer Engineering +12 years experience or MS Electrical/Computer Engineering +10 years experience
• Proficiency in Python/Ruby, TCL, BASH
• Strong understanding of VLSI and ASIC physical design
• Basic understanding of PLLs and clock networks
• Familiarity with design elements like flip flops, latches, memories, and basic CMOS logic gates
• Experience using a static timing analysis tool, preferably Synopsys PrimeTime and/or Cadence Tempus
• Ability to create and debug timing constraints
• Ability to understand and debug warning and error messages from the timing tool
• Ability to generate and understand timing reports
• Solid understanding of RC networks and how they affect the timing/propagation of signals
• Understanding of Signal Integrity, Crosstalk Delay, and Glitch/Noise Analysis
• Understanding of setup analysis, hold analysis, and other timing checks
• Ability to understand and create timing diagrams
• Strong ability to debug problems and create solutions
• Ability to work and clearly communicate with multiple engineers and teams
• Ability to work with and organize large amounts of data
• Ability to organize and present data in a clear manner
• Ability to manage a large variety of tasks

Good to Have

• Understanding of advanced STA concepts (POCV/SOCV/LVF modeling of variation, MIS, CCS/ECSM/NLDM, PBA, LOCV/SOCV)
• Experience using SPICE analysis
• Experience with at least one or two other coding languages besides TCL
• Experience in Semiconductor RTL to OASIS techniques
• Experience in Semiconductor Static Timing Analysis
• Experience in Design Automation and Flows development
• Experience with Linux

Perks & Benefits

• Discretionary annual bonus
• Equity in accordance with equity plan documents and equity award agreements
• Medical, dental and vision plans
• 401(K) participation including company matching
• Employee Stock Purchase Program (ESPP)
• Employee Assistance Program (EAP)
• Company paid holidays
• Paid sick leave
• Vacation time
• Paid Family Leave and other leaves of absence

Job Description:

Design Automation Engineer Job Description

We are a world class semiconductor ASIC provider. We provide first time correct on schedule ASIC designs by relying on proven flows and methodology. As a STA Design Automation Engineer you will join a highly skilled team of engineers that own and provide the flows that enable our ASIC design teams. This position would focus on developing, testing, and enhancing our STA methodology and flow.

Qualifications

• BS Electrical/Computer Engineering +12 years experience or MS Electrical/Computer Engineering +10 years experience
• Programming Languages: Python/Ruby, TCL, BASH
• Professional, open, and highly self-motivated attitude
• Strong understanding of VLSI and ASIC physical design
• Should have basic understanding of PLLs and clock networks
• Should be familiar with design elements like flip flops, latches, memories, and basic CMOS logic gates
• Experience using a static timing analysis tool. Preferably Synopsys PrimeTime and/or Cadence Tempus.
• Ability to create and debug timing constraints
• Ability to understand and debug warning and error messages from the timing tool
• Ability to generate and understand timing reports

Understanding of basic STA concepts:

• Solid understanding of RC networks and how they affect the timing/propagation of signals
• Understanding of Signal Integrity, Crosstalk Delay, and Glitch/Noise Analysis
• Understanding of setup analysis, hold analysis, and other timing checks
• Ability to understand and create timing diagrams

Preferred understanding of more advanced STA concepts:

• POCV/SOCV/LVF modeling of variation
• MIS - multi input switching
• CCS/ECSM/NLDM - liberty timing models
• PBA - path based analysis
• LOCV/SOCV - location aware timing derates

Experience using SPICE analysis

Coding experience:

• TCL is required. Experience with at least one or two other coding languages is preferred

Communication and organizational skills:

• Must have the ability to work and clearly communicate with multiple engineers and teams
• Must have the ability to work with and organize large amounts of data
• Must be able to organize and present data in a clear manner
• Must be able to manage a large variety of tasks

Strong ability to debug problems and create solutions:

• STA requires a person with strong engineering capabilities and good engineering judgement.

Ideally you are also experienced in:

• Semiconductor RTL to OASIS techniques
• Semiconductor Static Timing Analysis
• Design Automation and Flows development
• Linux

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $127,100 - $203,400.

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.