Design Verification Intern

1 Hour ago • All levels
Testing

Job Description

Marvell is a semiconductor solutions company enabling data infrastructure. This Design Verification Intern role is within Marvell Central Engineering, focusing on advanced High-Speed SerDes (HSS) IPs. The intern will be involved in creating test plans, writing new test cases, running simulations, debugging, and improving coverage for block design operations. This position offers an opportunity to contribute to DV strategy and tool scripts.
Good To Have:
  • Familiarity with UVM.
  • Experience with scripting languages, e.g., Python or Perl.
  • Experience with Linux working environment.
Must Have:
  • Read and understand Spec, create test plan and coverage plan.
  • Study existing coverage group definition, and test cases, write new testcases, constraint randomized testcases to enhance coverage.
  • Running simulation and understand the block design operation and debug.
  • Coverage improvement and closure.
  • Currently pursuing a Bachelor's / Master's degree in Electrical Engineering, Computer Engineering or Electrical & Computer Engineering.
  • Cumulative 3.2/4.0 GPA or higher.
  • Familiar with Verilog and SystemVerilog.
Perks:
  • Competitive compensation
  • Great benefits
  • Workstyle within an environment of shared collaboration, transparency, and inclusivity
  • Tools and resources to succeed
  • Opportunity to grow and develop

Add these skills to join the top 1% applicants for this job

communication
game-texts
test-coverage
linux
python
perl

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Group Description

Marvell Central Engineering (CE) develops Marvell most advanced High-Speed SerDes (HSS) IPs covering multiple applications, Switch, Automotive, Storage, Optics, etc. Acting as the engine to the company, Central Engineering provides the source of power to every business unit in Marvell system.

What You Can Expect

  • Read and understand Spec, create test plan and coverage plan.
  • Study the existing coverage group definition, and test cases, write new testcases, constraint randomized testcases to enhance coverage
  • Running simulation and understand the block design operation and debug
  • Coverage improvement and closure
  • Contribute to the improvements on DV strategy, flow, tool scripts

What We're Looking For

  • Currently pursuing a Bachelor's / Master's degree in Electrical Engineering, Computer Engineering or Electrical & Computer Engineering
  • Cumulative 3.2/4.0 GPA or higher
  • Familiar with Verilog and SystemVerilog, preferably with UVM is a plus.
  • Experience with scripting languages, e.g., Python or Perl and Linux working enviroment is a plus
  • Good English

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.

Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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