Director-Design Verification

Job Description:

Intel is seeking a highly accomplished and strategic engineering leader to drive Silicon Verification and Validation for an emerging class of enterprise products. This critical leadership position would be responsible for defining and executing the modeling, verification and validation strategy, from initial concept and architecture phase through to volume production and deployment. The ideal candidate is a visionary with a proven track record of building and leading large and highly performance teams and delivering high-quality, bug-free and best-in-class silicon solutions to market. This role requires a deep technical background in all aspects of verification, coupled with a broad understanding of the entire silicon development lifecycle, from architecture to physical design.

Responsibilities

• Strategic Leadership: Develop and champion the organization’s silicon verification and validation roadmap, aligning with product requirements, business objectives and industry trends
• Team Management: Lead, mentor and grow a high performing team of verification, modeling and validation engineers. Foster a culture of excellence, innovation and continuous improvement
• Verification Methodology: Define, implement and improve methodologies, tools and flows, e.g SystemC, UVM, Formal Verification, Simulation Acceleration. Develop solutions that span from IP, subsystems, SOCs to rack-scale systems.
• Validation Strategy: Develop a post-silicon validation strategy, including bring-up, characterization and system-level validation to ensure product meets key performance, power and functional specifications.
• Cross-functional Collaboration: Partner closely with silicon architecture, design, DFT, physical design and software teams, to ensure seamless and timely development
• Quality & Risk Management: Establish and monitor key quality metrics. Proactively identify and mitigate technical risk through the development process
• Resource Management: Manage budgeting, resources and project timelines across all verification and validation activities
• Technical Expertise: Act as the domain authority for verification and validation challenges, driving technical decisions and problem-solving

Additional Skills

• Leadership Skills: Exceptional leadership, communication and interpersonal skills. Ability to influence stakeholders at all levels and drive alignment across multiple organizations.
• Problem Solving: Strong analytical and problem solving skills with a keen attention to detail

Qualifications:

Minimum qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering or a related field with 12+ years of experience .
• 8+ years of progressive experience in silicon verification and validation
• 5+ years of experience in leadership roles, building and managing teams, coupled with a track record in developing and delivering IP and Silicon products, from definition to deployment.
• 5+ years of experience with pre-silicon modeling and design verification, including developing architecture exploration tools, test planning, testbench development (SystemC, SystemVerilog, UVM), coverage analysis, debug
• Proven track record of architecting and executing modeling and verification plans for complex CPUs, GPUs, SOCs or other high-performance complex IPs and subsystems.

Preferred Qualifications

• Deep Modeling, Verification and Validation Roots:
• Expertise in verification methodologies, including formal verification, hybrid models, low power and simulation acceleration through emulation or FPGA prototyping
• Experience in silicon validation, from initial lab bring-up and boot, thorough software stabilization to power and performance tuning
• Silicon Lifecycle Responsibilities: Demonstrated experience interacting with and understanding challenges of adjacent fields such as:
• Architecture: Experience influencing specification development through developing high level simulation models and factoring in verification and testability perspectives
• Design: A strong understanding of microarchitecture, RTL design & tradeoffs along with simulation and front-end tools.
• Design for Test : A solid grasp of DFT concepts, including JTAG, scan, MBIST and ATPG. Experience in collaborating with DFT team in per-silicon verification
• Physical Design : An appreciation of physical design process and flow (synthesis, P&R, power estimation, timing closure) and its impact on the architecture and design choices

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Santa Clara

Additional Locations:

Business group:

As a member of the Chief Technology Office, Artificial Intelligence, and Network and Edge Group (CTO AI NEX), you will be committed to strategically penetrating the AI market by delivering disruptive and transformative solutions. Your focus will be on leveraging technology innovation and incubation to drive commercial success, ensuring that advancements create significant value. The team is dedicated to driving the software-defined transformation of the world's networks profitably, setting new standards for efficiency and connectivity. Through these priorities, you aim to lead the way in technological evolution and redefine the future of global networks.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003

Annual Salary Range for jobs which could be performed in the US:

$204,500.00-$288,710.00

Salary range dependent on a number of factors including location and experience.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.