Intern-Product Validation

This internship involves assisting in the development and validation of Cadence's hierarchical solutions. Key responsibilities include validating and maintaining comprehensive hierarchical solution unit and flow test cases for the Innovus Digital Implementation System and developing test suites for new features. Candidates should have an MS in microelectronics or EE, with necessary digital IC design knowledge and good communication skills in English and Chinese. A preference is given to interns who can work 3-4 days per week for 6+ months.

Must Have

• MS in microelectronics, EE and related majors
• Digital IC design knowledge is necessary
• Good communication in English and Chinese
• Good confidence and self-motivation

Good to Have

• Statistic timing analysis knowledge
• Unix System knowledge
• vi/TCL/TK/CSH/Perl

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

The Position Description are:

a) Assist in Cadence hierarchical solution area development and validation.

b) Validate and maintain comprehensive hierarchical solution unit and flow test cases for Innovus Digital Implementation System.

c) Develop test suites of the new features of hierarchical functional/flow solution.

The Position Requirements are:

a) MS in microelectronics, EE and related majors.

b) Digital IC design knowledge is necessary, statistic timing analysis knowledge is a strong plus.

c) Unix System knowledge, vi/TCL/TK/CSH/Perl will be plus.

d) Good communication in English and Chinese, good confidence and self-motivation.

Prefer to work 3-4 days per week for 6+ months.

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