Sr Principal Design Engineer
4 Months ago • 15-18 Years
Software Development & Engineering
Job Description
The Sr Principal Design Engineer role at Cadence requires a BTech/MTech in Engineering with 15-18 years of experience in Hardware Design Architect. Responsibilities include designing PCIE/LPDDR5/UCIE/Ethernet/MIPI protocol designs and preparing SOC hardware architecture specifications. The role involves Verilog/System-Verilog RTL logic design, debugging, and functional verification support. The job description emphasizes the company's focus on hiring leaders and innovators to make an impact on technology and solve complex challenges.
Must Have:
- BTech/MTech in Engineering
- 15-18 years of Hardware Design Architect experience
- Experience with PCIE/LPDDR5/UCIE/Ethernet/MIPI protocol designs
- Verilog/System-Verilog RTL logic design and verification support
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
BTech/ MTech in Engineering with 15 to 18 years of actual work experience in Hardware Design Architect.Worked on PCIE/LPDDR5/UCIE/Ethernet/MIPI Protocol Designs. Prepare SOC hardwareArchitecture Specification to Start the Design and Verification Implementation. Verilog / System-Verilog RTL logic design, debug, and functional verification supportN/AWe’re doing work that matters. Help us solve what others can’t.
Set alerts for more jobs like Sr Principal Design Engineer
Set alerts for new jobs by Cadence
Set alerts for new Software Development & Engineering jobs in India
Set alerts for new jobs in India
Set alerts for Software Development & Engineering (Remote) jobs
