Synthesis Engineer, Sr Engineer

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Must Have

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field with 6+ years of Hardware Engineering experience.
• Master's degree in Computer Science, Electrical/Electronics Engineering, or related field with 5+ years of Hardware Engineering experience.
• PhD in Computer Science, Electrical/Electronics Engineering, or related field with 4+ years of Hardware Engineering experience.
• Strong understanding and in-depth knowledge of Physical Synthesis and Synthesis methodologies with leading industry standard tools.
• Experience with writing timing constraints for synthesis, STA, timing closure and pipelining for performance optimization.
• Experience in all aspects of timing closure for multi-clock domain designs.
• Familiarity with MCMM synthesis and optimization.
• Good understanding of low-power design implementation using UPF.
• Experience with scripting languages such as Perl, Python, TCL.
• Experience with power optimization flows or techniques like clock gating.
• Ability to work independently with design, DFT and PD teams for netlist delivery and timing constraints validation.
• Ability to handle ECOs and formal verification and maintain high quality matrix.
• Minimum 3 years of experience.

Perks & Benefits

• World-class health benefit options providing world-class coverage to employees and their eligible dependents.
• Programs designed to help employees build and prepare for a financially secure future.
• Self and family resources to build emotional/mental strength and resilience and define purpose.
• Wellbeing programs and resources to support employees to Live+Well and Work+Well.
• Continuous learning and development programs.
• Tuition reimbursement.
• Mentorships.

Job Posting Date

2025-12-22

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Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.

OR

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.

OR

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

• Should have strong understanding and in-depth knowledge of Physical Synthesis and Synthesis methodologies with leading industry standard tools.
• Experience with writing timing constraints for synthesis, STA, timing closure and pipelining at different levels for performance optimization and timing closure.
• Experience in all aspects of timing closure for multi-clock domain designs.
• Should be familiar with MCMM synthesis and optimization.
• Should have good understanding of low-power design implementation using UPF.
• Experience with scripting language such as Perl/ Python, TCL.
• Experience with different power optimization flows or technique such as clock gating.
• Should be able to work independently with design, DFT and PD team for netlist delivery, timing constraints validation
• Should be able to handle ECOs and formal verification and maintain high quality matrix
• 3+ yrs experience