Analog Intern - Bachelor's Degree (PEY / Full-Year) [US]
Job Description
- Finished 3rd year of undergraduate study in EE or related technical field(s)
- Strong intuitive and analytical understanding of transistor level design
- Experience in Cadence schematics capture, simulation and layout
- Ability to write behavioral models for both analog and digital circuits
- Ability to define and adhere to project schedules
- Effective written and verbal communication skills
- Medical coverage
- Dental coverage
- Vision coverage
- Perks and discount programs
- Wellness & mental health support including coaching and therapy
- Paid holidays
- Paid volunteer days
- Paid sick time
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
Marvell’s Central Engineering Team is seeking an analog mixed signal design intern to support the development of analog IP products for AI applications. Job responsibilities include support of IC design through design and layout, silicon evaluation and characterization. The successful candidate will be self-motivated, willing to learn exciting new technologies and be able to work effectively within a talented group of individuals.
What You Can Expect
- Verify analog IC design using spice simulations
- Run Electromigration/IR drop (EMIR) on analog IC layout
- Run co-simulation between digital and analog designs
- Run Static Timing Analysis (STA) on high speed analog IC design
- Develop and enhance flows that support and facilitate robust analog IC design
- Projects can vary depends on product cycle and individual student interest. You will gain exposure to a variety of IC design engineering skills and tools during your internship.
What We're Looking For
- Must have finished 3rd year of undergraduate study in EE or related technical field(s) when joining Marvell
- Strong intuitive and analytical understanding of transistor level design
- Experience in Cadence schematics capture, simulation and layout
- Ability to write behavioral models for both and analog and digital circuits
- Ability to define and adhere to project schedules
- Ability to have effective written and verbal communication skills
Expected Base Pay Range (USD)
31 - 61, $ per hour.
The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
For Internship roles, we are proud to offer the following benefits package during the internship - medical, dental and vision coverage, perks and discount programs, wellness & mental health support including coaching and therapy, paid holidays, paid volunteer days and paid sick time. Additional compensation may be available for intern PhD candidates.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
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