CPU Physical Design Engineer

rivos

| Santa Clara, California, United States (On Site) | Full Time | 51 months ago
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Job Summary

The job involves full-time CPU physical design roles, covering unit to chip levels and all physical design functions including place & route, timing, floorplan, clocking, and power. Responsibilities include owning block-level design from RTL-to-GDSII, driving synthesis, floor-planning, place & route, timing closure, and signoff. It also entails working with micro-architects for feasibility studies and PPA tradeoffs, developing physical design methodologies, and collaborating with multi-functional teams for validation and signoff flows like Timing, Power, EM/IR, and PDV.

Must Have

  • Knowledge of synthesis, place & route, analysis tools
  • Familiarity with logic & physical design principles
  • Knowledge of scripting (Unix, Perl, Python, TCL)
  • Understanding of device physics
  • Knowledge of Verilog and SystemVerilog
  • Excellent problem-solving skills
  • Ability to work in a team
  • PhD, Master’s, or Bachelor’s in technical field

Good to Have

  • Knowledge of CPU Core & L2 microarchitecture
  • Experience in deep sub-micron technologies

Job Description

Positions are open for full-time in the areas of CPU physical design from unit level to chip level, involving all aspects of physical design functions such as P&R, timing, floorplan, clocking, and power.

Responsibilities

    • Own block level design of CPU Core/L2 blocks from RTL-to-GDSII and drive synthesis, floor-planning, place & route, timing closure, and signoff.
    • Work extensively with Micro-architects to perform feasibility studies and explore performance, power & area (PPA) tradeoffs for design closure.
    • Develop physical design methodologies and customize recipes across various implementation steps to optimize PPA.
    • Work with a multi-functional engineering team to implement and validate physical design by running all signoff flows such as Timing, Power, EM/IR, PDV.

Requirements

    • Knowledge using synthesis, place & route, analysis and verification CAD tools.
    • Familiarity with logic & physical design principles to drive low-power & higher-performance designs.
    • Knowledge of CPU Core & L2 microarchitecture will be beneficial.
    • Knowledge of scripting in some of these languages: Unix, Perl, Python, and TCL.
    • Good understanding of device physics and experience in deep sub-micron technologiesKnowledge of Verilog and SystemVerilog.
    • Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated.
    • Ability to work well in a team and be productive under aggressive schedules.
Education and Experience
PhD, Master’s Degree or Bachelor’s Degree in technical subject area.

6 Skills Required For This Role

Cad Computer Aided Design Unity Unix Level Design Python Perl