Design Engineer Intern (Summer 2026)

The Cadence Tensilica CPU Processor Team is seeking a Design Engineering Intern for Summer 2026. This role involves working on RTL implementation of microprocessor cores, multiprocessor sub-systems, and peripherals. Responsibilities include micro-architecture implementation in Verilog RTL, simulation, debugging, and running EDA scripts to meet design goals. Interns will also assist with test plan development, functional diagnostics, and failure analysis, collaborating with Design Verification and EDA teams. This is an opportunity to contribute to industry-leading processor cores used in intelligent IoT and ML/AI applications.

Must Have

• Currently enrolled in MS/BS major as Electrical Engineering, Computer Engineering, or equivalent
• Deep understanding of Digital Design and/or Design Verification Fundamentals
• Excellent automation skills using Tcl, Perl, shell scripting
• Excellent oral and written communications skills

Good to Have

• Exposure to design automation tools

Design Engineering Intern

The Cadence Tensilica CPU Processor Team is seeing rapid adoption of our industry leading processor cores and DSP's. Our configurable and extensible processor cores are poised to meet the demands of intelligent IoT Devices at the edge of ML/AI Applications. We are already empowering many of the top chip and system companies with our Audio, Speech, AR/VR, ADAS, Vision and Imaging applications being driven with our processor cores. Today Cadence is shipping an astounding 8 Billion processor cores annually and expanding into intelligent system design and development.

Cadence Tensilica CPU Processor Team is hiring students to join our R&D teams in San Jose and Austin. This is an amazing opportunity to work as an engineering intern at a world leader in computational software, semiconductor design IP, and system verification hardware. Our customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial, and healthcare.

Come be part of this great Processor team where you can make an impact that is visible.

Perform as a member of the Logic Design Team for Xtensa processors. Responsible for the RTL implementation of microprocessor cores, multiprocessor sub-systems and their peripherals. Implement the micro-architecture in Verilog RTL, simulate and debug its functions and run synthesis, place & route and other Electronic Design Automation scripts to meet timing, area, and power goals. Assist with developing test plans; writing functional diagnostics; debugging failures; and analyzing coverage information. Work closely with various Design Verification and Electronic Design Automation teams.

Position Requirements:

• Currently enrolled in MS/BS major as Electrical Engineering, Computer Engineering, or equivalent.
• Deep understanding of Digital Design and/or Design Verification Fundamentals
• Excellent automation skills using Tcl, Perl, shell scripting
• Excellent oral and written communications skills
• Exposure to design automation tools is a plus