Emulation Design Engineer

The Emulation Design Engineer will develop and validate full-system design verification environments, focusing on high-speed interface-based subsystems in Emulation Platforms. This includes developing parallel and serial models for analog Mixed Signal Designs, integrating PHY, Controller/Mac, and Accelerable Verification IP (AVIP) environments on Palladium and Protium. The role involves end-to-end verification flow development, custom test case creation, and validating bare-metal-driver components.

Must Have

• Lead the design and deployment of Emulation PHY logic and models for Palladium and Protium.
• Optimize designs for multi-clock domain synchronization, area, and performance.
• Develop and maintain end-to-end verification environments, encompassing system-level models, test case generation, and interface circuit performance analysis.
• Contribute to system prototyping for early bring-up and validation of full-system designs.
• Collaborate with cross-functional teams to ensure seamless integration from simulation to emulation.
• Drive innovation in emulatable IP solutions and contribute to the evolution of verification methodologies.
• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• 5-16 years of experience.
• Strong experience with system-level design and communication standards such as PCIe, UCIe, Ethernet, UALink, DDR, USB, SPI, JTAG, AMBA protocols.
• Proficiency in SystemVerilog for synthesizable RTL design.
• Proficiency in C and Python for modeling, scripting, and automation.
• Experience converting Analog Mixed Signal Designs logic to emulation compatible models.
• Experience with debug and test case development.
• Hands-on experience with emulation platforms: Palladium, Protium, Zebu, HAPS, Veloci, FPGA.
• Deep understanding of verification flows and emulation acceleration techniques.

Good to Have

• Experience building emulatable AVIP solutions.
• Familiarity with end-to-end verification environments from simulation through emulation.
• Experience in system prototyping and bring-up.
• Strong analytical and problem-solving skills.
• Excellent communication and leadership abilities.

We are seeking a highly skilled Emulation Design Engineer to drive the development of full-system design verification environments. This role focuses on developing and integrating and validating high speed interface [Serdes, Chip 2 chip link] based subsystems in Emulation Platforms. Development includes Parallel and Serial models for highspeed interface circuits in analog Mixed Signal Designs and components (PHYs). Integration includes the PHY, Controller / Mac and the Accelerable Verification IP (AVIP) environments on Palladium and Protium. End-to-end verification flow development across a wide range of system components including custom test case developments, validating the bare-metal-driver components in emulation platforms.

Key Responsibilities:

• Lead the design and deployment of Emulation PHY logic and models for platforms including Palladium and Protium.
• Optimize designs for multi-clock domain synchronization, area, and performance, with a focus on accuracy vs. runtime trade-offs.
• Develop and maintain end-to-end verification environments, encompassing:
• System-level models including microcontrollers, memories, NoC (Network-on-Chip), and high-speed communication interface
• Test case generation
• Interface Circuit Performance Analysis
• Contribute to system prototyping for early bring-up and validation of full-system designs.
• Collaborate with cross-functional teams to ensure seamless integration from simulation to emulation.
• Drive innovation in emulatable IP solutions and contribute to the evolution of verification methodologies.

Required Qualifications:

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• Experience of 5-16 years. Multiple positions available.
• Strong experience with system-level design and communication standards such as: PCIe, UCIe, Ethernet, UALink, DDR, USB, SPI, JTAG, AMBA protocols
• Proficiency in:
• SystemVerilog for synthesizable RTL design
• C and Python for modeling,scripting, and automation
• Converting Analog Mixed Signal Designs logic to emulation compatible models maintaining functional and bit accuracy, and enabling software stack development for configuration, control and status monitoring
• Debug and test case development
• Hands-on experience with emulation platforms: Palladium, Protium, Zebu, HAPS, Veloci, FPGA
• Deep understanding of verification flows and emulation acceleration techniques

Preferred Skills:

• Experience building emulatable AVIP solutions
• Familiarity with end-to-end verification environments from simulation through emulation
• Experience in system prototyping and bring-up
• Strong analytical and problem-solving skills
• Excellent communication and leadership abilities.

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