FEC/DSP Architecture Engineer

11 Minutes ago • All levels
System Design

Job Description

Marvell Argentina is seeking an FEC/DSP Architecture Engineer to design and validate forward error correction and DSP schemes for optical coherent transceivers. This role involves implementing critical hardware blocks (ASICs) using HDL, focusing on reliability and validation. The engineer will work on advanced FEC/DSP schemes, solving complex optimization problems, and will be responsible for algorithm design, digital architecture verification, and software development for communication system simulations.
Good To Have:
  • Prior experience in advanced digital architectures design and testing
Must Have:
  • Engineering degree in electronics, computer software, or telecommunications
  • Proven experience in C, C++, Verilog, SystemVerilog, and Python programming
  • Good written and oral communication skills
Perks:
  • Competitive compensation
  • Great benefits
  • Workstyle within an environment of shared collaboration, transparency, and inclusivity
  • Tools and resources needed to succeed
  • Opportunity to grow and develop

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About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Marvell Argentina is looking for candidates to be part of a team that designs forward error correction (FEC) and DSP schemes for optical coherent transceivers. The FEC scheme is one of most critical parts in transceivers, because it allows error free communications. These blocks are implemented in hardware (ASICs) using a Hardware Description Language (HDL). So, the reliability and validation of these blocks is critical. This job gives you the opportunity to work on some of the most advanced FEC/DSP schemes in the world together with very talented people, so we expect exceptional engineers and scientists. As we solve complex optimization problems, proven experience or skill in this field will be well considered. We value curious, self-motivated, eager to learn and teamworking people. It is not mandatory to have experience in error correcting schemes: talent and drive matter far more. The chosen candidate will be focused on the analysis and implementation of state-of-the-art of error correction techniques. The analysis will be based on floating- and fixed-point simulation platforms. The implementation will be based on HDL such as Verilog or System Verilog.

What You Can Expect

  • Optical communication oriented FEC algorithms design and validation.
  • Design and verification of digital implementation architectures.
  • Software development for simulation of communications systems.

What We're Looking For

  • Engineering degree in electronics, computer software, or telecommunications
  • Proven experience in C, C++, Verilog, SystemVerilog, and Python programming.
  • Good written and oral communication skills.

Preferred but not required:

  • Prior experience in advanced digital architectures design and testing.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews. Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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