Sr. Principal EDA Software Engineer (C++, Characterization)

2 Months ago • 8 Years + • Research & Development

About the job

Job Description

Cadence seeks a Sr. Principal EDA Software Engineer with 8+ years of experience developing EDA tools for transistor level analysis. Must have C++ expertise, proficiency in data structures and algorithms, and experience with Linux. Responsibilities include enhancing existing tools and creating new frameworks for advanced circuit analysis.
Must have:
  • EDA Tools Development
  • Hardcore C++ Knowledge
  • Data Structures Design
  • Linux Environment
Good to have:
  • Circuit Simulation
  • Library Characterization
  • Distributed Programming
  • Database Design
Perks:
  • Employee Stock Plan
  • 401(k) Plan
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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

You will be a member of an expert R&D team creating technologies and products that enable static and dynamic transistor level analysis of the most advanced custom digital and mixed-signal circuits built for communication, IOT and AI markets. 

Must haves:

  • 8+ years of experience in development of EDA tools and one or more of transistor level timing, power, noise, aging, reliability, and emir analysis
  • Hardcore C++ Knowledge – Linux
  • Proficiency designing data structures, algorithms, and software engineering principles
  • Industry experience developing and maintaining C++ based applications on a Unix or Linux environment

Requirements:

  • Experience with quality and software processes
  • Proficiency designing data structures, algorithms, and software engineering principles
  • Proficiency in analyzing transistor or gate level schematics
  • The preferred candidate is expected to have a BS in CS/EE/CE

Nice to haves:

  • Experience in development of circuit simulation or library characterization programs
  • High level understanding of SPICE simulation transistor models
  • Experience with distributed programming, database design, and cloud APIs for distributed computing

Your work will be focused on:

  • Enhancing and expanding the existing tools' architecture to cover timing analysis
  • Creating new frameworks for analysis of effects dominant at n5 and below
  • Using machine learning technology to bring order of magnitude speed / capacity / usability improvements over existing solutions

The annual salary range for California is $150,500 to $279,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

View Full Job Description
$150.5K - $279.5K/yr (Outscal est.)
$215.0K/yr avg.
San Jose, California, United States

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About The Company

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Feldkirchen, Bavaria, Germany (Hybrid)

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Bengaluru, Karnataka, India (On-Site)

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