Performance Modeling Engineer
Job Description
- Exposure to x86 architecture and its performance optimization aspects
- Knowledge of digital design and verification processes
- Familiarity with scripting and automation tools to streamline and enhance modeling workflows
- Experience with scalable interconnects and memory technologies
- Understanding of quality-of-service (QoS) concepts in system design
- Participate in Performance model/RTL design correlation for next-generation memory technologies, scalable interconnects, and quality-of-service
- Conduct performance analysis and validate metrics against hardware implementations, ensuring accurate modeling
- Collaborate with architects and design teams to ensure the alignment of performance models with the overall system architecture
- Participate in performance model/RTL design correlation efforts to achieve high accuracy
- Understand and contribute to SoC interconnect and memory controller architecture
- Familiar with and understand how to use micro-benchmarks and workloads to identify perf gaps between RTL and model
- Strong verification experience (SystemVerilog, UVM)
- Proficiency in C++ and object-oriented programming, Python (or similar)
Project description
We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way. As Performance Modeling Engineer, you will take part in the development of performance models for high-performance computing systems, enabling accurate architectural analysis and optimization of advanced processors. We are looking for someone who has a passion for modern, complex processor architecture, digital design, and verification in general. Who are a team player and has good communication skills, strong analytical and problem-solving skills and willing to learn and ready to accept challenges.
Responsibilities
- Participate in Performance model/RTL design correlation for next-generation memory technologies, scalable interconnects, and quality-of-service
- Conduct performance analysis and validate metrics against hardware implementations, ensuring accurate modeling
- Collaborate with architects and design teams to ensure the alignment of performance models with the overall system architecture
- Participate in performance model/RTL design correlation efforts to achieve high accuracy
- Understand and contribute to SoC interconnect and memory controller architecture
- Familiar with and understand how to use micro-benchmarks and workloads to identify perf gaps between RTL and model
Skills
Must have
- Strong verification experience (SystemVerilog, UVM)
- Proficiency in C++ and object-oriented programming, Python (or similar)
Nice to have
- Exposure to x86 architecture and its performance optimization aspects
- Knowledge of digital design and verification processes
- Familiarity with scripting and automation tools to streamline and enhance modeling workflows
- Experience with scalable interconnects and memory technologies
- Understanding of quality-of-service (QoS) concepts in system design
Other
Languages
English: B2 Upper Intermediate
Seniority
Regular
