ASIC Design Engineer

Marvell is a semiconductor solutions company enabling data infrastructure across enterprise, cloud, AI, automotive, and carrier architectures. This role is for an ASIC Design Engineer within a design team working on state-of-the-art datacenter and AI SOCs. The engineer will participate in micro-architecture definition, write specifications, implement designs using low-power RTL coding, collaborate with verification and physical design teams, and support post-silicon bring-up and software integration to meet customer use cases.

Must Have

• Participate in micro-architecture definition of SubSystems and/or the chip
• Write specifications and micro-architecture of the design
• Implement designs using low-power RTL coding techniques
• Collaborate with the verification team on test plan, coverage analysis, simulation, and debug
• Work with the physical design team in aiding implementation of functional blocks
• Interact with the project lead to scope tasks
• Work with multiple design centers and design groups
• Support the post silicon team to bring up silicon in the lab
• Work with the software team and customers to ensure product meets use cases
• Fluent in System Verilog RTL coding techniques
• Familiar with modern SoC architectures and interface technologies (AXI, HBM, LPDDR/DDR, Ethernet, PCIe, D2D)
• Experience in micro-architecture of complex custom/ASIC products (NPU, AI accelerators, embedded processors, DSP, graphics, general purpose microprocessors)
• RTL design experience, synthesis, static-timing closure, formal verification, gate-level simulations, block-level functional verification
• Experience in implementation/timing closure for high speed design

Good to Have

• Hands-on experience for all aspects of chip-development process with proficiency in front-end design tools and methodologies
• Experience in memory interface design (HBM, LPDDR/DDR)
• Knowledge of scripting languages such as Python, Perl, Tcl, and UNIX shell

Perks & Benefits

• Competitive compensation
• Great benefits
• Workstyle within an environment of shared collaboration, transparency, and inclusivity
• Tools and resources to succeed
• Opportunities to grow and develop

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Our design team works on state-of-the-art datacenter and AI SOCs. As a member of the R&D team, you will design world-class hardware for the industry's largest customers.

This team hires some of the biggest problem solvers in Silicon and has a huge impact on the work done at Marvell. The customers served by this team are often other chip companies and big tech companies, familiar names to all candidates.

What You Can Expect

In this role, you will:

• Participate in the micro-architecture definition of various SubSystems and/or the chip
• Write specifications and micro-architecture of the design
• Implement designs using low-power RTL coding techniques
• Collaborate with the verification team on the verification test plan, coverage analysis, and full-chip simulation plus debug
• Work with the physical design team in aiding the implementation of the functional blocks
• Interact with the project lead to scope tasks
• Work with multiple design centers and design groups on the development of the projects
• Support the post silicon team to bring up silicon in the lab
• Work with the software team and in some cases the customer to ensure product meets customer use cases

What We're Looking For

Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 1+ years of related professional experience. Or Master’s degree in Computer Science, Electrical Engineering or related fields with 1+ years of experience.

To be successful in this role you will need to be:

• Fluent in System Verilog RTL coding techniques.
• Familiar with modern SoC architectures and various interface technologies such as AXI, HBM, LPDDR/DDR, Ethernet, PCIe, D2D.
• Experience in micro-architecture of complex custom/ASIC products focusing in one or more of the following areas: NPU, AI accelerators, embedded processors, DSP, graphics, and general purpose microprocessors.
• RTL design experience, synthesis, static-timing closure, formal verification, gate-level simulations, and block-level functional verification.
• Experience in implementation/timing closure for high speed design.
• Hands-on experience for all aspects of chip-development process with proficiency in front-end design tools and methodologies is a plus.
• Experience in memory interface design (HBM, LPDDR/DDR) is a plus.
• Knowledge of scripting languages such as Python, Perl, Tcl, and UNIX shell is desirable.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.

Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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