Cadence is seeking a Summer Intern for Foundry. This role involves understanding physical design automation flow and EDA tool functions, running EDA tools for flow automation and QA, generating feedback for bug fixes, developing documentation, and tracking project schedules. Candidates should have an understanding of ASIC design flow, good knowledge of physical design automation flow, Tcl or Perl scripting, MS Office, VLSI design experience, and good troubleshooting skills. A BS degree or above is required.
Good To Have:- RTL design using Verilog HDL
Must Have:- Detailed understanding of physical design automation flow and EDA tool functions
- Running EDA tools in each technical area to qualify the flow automation and QA
- Generating feedback for bug fixes and enhancements
- Developing documentation for knowledge sharing and training
- Tracking project schedules and documenting all phases of work
- Understanding of ASIC design flow
- Good knowledge of physical design automation flow
- Tcl or Perl scripting
- MS Office
- VLSI design experience
- Good trouble-shooting skills
- BS or above education