Compute Subsystem Verification Engineer
1 Day ago • All levels
System Design
Job Description
Qualcomm Canada ULC is seeking a creative ASIC verification engineer to develop world-class multimedia and compute solutions for next-generation mobile System-on-Chips (SoCs). Responsibilities include developing verification strategies and test plans, creating UVM/System Verilog environments, resolving design problems, writing tests, developing C reference models, interpreting performance checks, and driving efficiency improvements in verification methodologies.
Must Have:
- Work closely with design, architects, and verification leads to develop multimedia and compute subsystem integration verification strategy and test plan
- Create verification environment using UVM/System Verilog
- Resolve architecture, design, or verification problems by applying sound ASIC engineering practices with minimal supervision
- Write tests and regressions to identify any bugs in own work and helps more junior team members do the same
- Develop C reference model
- Interpret the results of performance checks and identify issues
- Communicate directly with lead on any significant deviations from the Plan of Record for assigned block in a timely manner
- Perform RTL code coverage, assertion coverage, functional coverage, and gate level simulations
- Employ power aware verification technique to verify low power design features
- Identify opportunity for productivity improvements. Drive and adopt new verification methodologies and flows for efficiency improvements
- Thorough understanding of Digital design concepts
- Strong UVM, System Verilog skills
- Understanding of Bus protocols like AHB/AXI
- Perl, python scripting experience
- Quick understanding of Specs and Standards and developing relevant and thorough test plans
- Experienced in developing monitors, scoreboards, sequencers and sequences and various aspects of the UVM testbenches
- Candidates should be comfortable checking builds, navigating test benches, analyzing coverage, and adding or enabling extra debug
- Bachelor's degree in Science, Engineering, or related field
Perks:
- World-class health benefit option providing world-class coverage to employees and their eligible dependents.
- Programs designed to help employees build and prepare for a financially secure future.
- Self and family resources to build emotional/mental strength and resilience, and define purpose.
- Wellbeing programs and resources to support employees to Live+Well and Work+Well.
- Continuous learning and development programs.
- Tuition reimbursement.
- Mentorships.
Job Posting Date
2025-09-18
Company:
Qualcomm Canada ULC
Job Area:
Engineering Group, Engineering Group > ASICS Engineering
General Summary:
Are you a creative engineer looking for challenges to develop technologies that improve people’s everyday life? We are searching an ASIC verification engineer interested in developing world-class multimedia and compute solutions to build next generation mobile System-on-Chips (SoCs).
Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field.
As a member of the team, your responsibilities include:
- Work closely with design, architects, and verification leads to develop the multimedia and compute subsystem integration verification strategy and test plan
- Create verification environment using UVM/System Verilog
- Resolve architecture, design, or verification problems by applying sound ASIC engineering practices with minimal supervision
- Write tests and regressions to identify any bugs in own work and helps more junior team members do the same
- Develop C reference model
- Interpret the results of performance checks and identify issues
- Communicate directly with lead on any significant deviations from the Plan of Record for assigned block in a timely manner
- Perform RTL code coverage, assertion coverage, functional coverage, and gate level simulations
- Employ power aware verification technique to verify low power design features
- Identify opportunity for productivity improvements. Drive and adopt new verification methodologies and flows for efficiency improvements
Required Competencies
- Ability to work legally in Canada
- Thorough understanding of Digital design concepts
- Strong UVM, System Verilog skills
- Understanding of Bus protocols like AHB/AXI
- Perl, python scripting experience
- Quick understanding of Specs and Standards and developing relevant and thorough test plans
- Experienced in developing monitors, scoreboards, sequencers and sequences and various aspects of the UVM testbenches
- Candidates should be comfortable checking builds, navigating test benches, analyzing coverage, and adding or enabling extra debug
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