As a Senior High Bandwidth Memory Test Engineer, you will develop, debug, and maintain code for parallel testing of advanced memory devices. This role involves supporting R&D, collaborating with global teams, and designing/debugging test hardware. You will learn new device specifications to create efficient production test solutions, optimize test algorithms, and understand advanced memory device functionality as per product data sheets.

Must Have

• Define Test Plans for new tests and test algorithms for HBM, covering software, hardware, defect coverage, characterization, trending, process flow, and test times.
• Develop test programs using Python and C coding on automated test equipment and release them to manufacturing.
• Demonstrate a thorough understanding of device/part as it applies to device/part testing.
• Ensure all test programs, scripts, and software adhere to release quality standards.
• Independently debug and identify root causes on test issues, providing solutions across internal/external groups.
• Provide meaningful statistical data analysis, analytics, and justification on program validation and release.
• Evaluate and verify yields/quality with global teams to ensure shipping highest quality product.
• Support internal and external groups on experiments to improve yield or capacity by resolving test issues.
• Drive innovation and improvement to reduce the Cost of Test in the Test Department.
• Support intra-departmental and multi-site teams in developing new processes and capabilities.
• Communicate effectively with both internal and external customers.
• Implement solutions to issues related to Probe and Test processes in a timely manner.
• Demonstrate ability to leverage existing resources and serve as a Liaison and Coach.
• Actively share and/or present technical information to a wide variety of audiences.
• Bachelor’s Degree in Electrical or Electronics Engineering.
• Minimum 5 years of experience in test solution engineering in semiconductor industry.
• Experienced in digital systems and digital logic for DRAM or HBM.
• Strong logical thinking and problem solving.

Perks & Benefits

• Paid Time Off
• Continuous Learning
• Wellness Programs
• Stock Purchase Program
• Health Insurance
• Recognition

JOB DESCRIPTION

As a Senior High Bandwidth Memory Test Engineer, you will develop, debug, and maintain code that enables the parallel testing of advanced memory devices. Test Engineers support R&D, interacting closely with global teams, as well as taking part in the designing and debugging of test hardware. In this position, you will constantly learn new device specifications and operations in order to develop efficient and innovative solutions of production test flows thru test algo optimization. Additionally, you will take responsibility to gain a firm understanding of the functionality of advanced memory devices as defined in product data sheets.

RESPONSIBILITIES AND TASKS:

• Experienced of definition of Test Plans for new tests and test algorithms for HBM, which covers test software and hardware requirements, defect coverage, characterization, trending, process flow, and test times.
• Experienced on test programs development for products using primarily Python and C coding on automated test equipment in the given area followed by test program release to manufacturing area.
• Demonstrate a thorough understanding of the device/part as it applies to device/part testing.
• Ensure all test programs, scripts, and any other software adhere to the release quality standards.
• Independently debug and identify root causes on test issues and provide solutions across internal/external groups.
• Provide meaningful statistical data analysis, analytics and justification on program validation and its release to ensure program quality.
• Evaluate and verify yields/quality with global teams to ensure we are shipping the highest quality product to our customers with enforce to all data sheet specifications.
• Support both internal and external groups on experiments designed to improve yield or capacity by resolving test issues that impact site in a timely manner.
• Drive Innovation and Improvement with the end goal of reducing the Cost of Test in the Test Department.
• Support intra-departmental (and multi-site) teams in development of new processes and capabilities to support product roadmap; lead teams and drive development where necessary.
• Communicate effectively with both internal and external customers Implement Solutions to Issues Related to Probe and Test processes in a Timely Manner
• Demonstrate ability to leverage on existing resources Serve as a Liaison and Coach
• Actively share and/or present technical information to a wide variety of audiences, including formal presentations (when necessary) to area, department, site, or larger industry groups

REQUIREMENTS:

• Bachelor’s Degree in Electrical, or Electronics Engineering
• Minimum 5 years of experience in test solution engineering in semiconductor industry.
• Experienced in digital systems and digital logic for DRAM or HBM.
• Strong logical thinking and problem solving.
• Display Micron Value of People. Innovation, Tenacity, Collaboration and Customer Focus