Lead DFT Engineer

The Lead DFT Engineer will be responsible for leading and coordinating full chip DFT tasks, collaborating with other DFT engineers to develop and implement new methodologies. This role requires strong technical expertise in design-for-test (DFT), including developing high-quality DFT methodologies, implementing and validating DFT RTL/IP, driving ATPG generation, and verifying chip designs for all DFT requirements. The engineer will also perform static timing/noise/coupling analysis, generate documentation and scripts, evaluate DFT tools, and debug production test patterns with ATE test engineers.

Must Have

• Lead and coordinate full chip DFT tasks
• Strong technical knowledge in design-for-test (DFT)
• Develop best-in-class DFT methodologies
• Implement, design, and validate DFT RTL/IP
• Drive ATPG generation and validation
• Verify chip design for DFT requirements (functional, coverage, static timing analysis)
• Perform Static Timing/Noise/Coupling Analysis for test modes
• Work with RTL design, test engineering, and ATE test teams

The position requires an energetic, proactive, self-starting person, who is able to lead and coordinate full chip DFT task and work closely with other DFT engineers to explore new methodologies. You must possess strong technical knowledge in the area of design-for-test (DFT).

Design for Test Engineer to perform any of the following ASIC design tasks:

• Develop best in class, highest quality DFT methodologies for all design teams in meeting all test requirements & silicon quality standards
• Implement/design/validate all DFT RTL/IP, required by all designs.
• Drive latest DFT tools to produces highest quality DFT RTL/IP.
• Drive ATPG generation/validation.
• Work with RTL design, test engineering teams to implement highest quality DFT implementation.
• Verify chip design for all DFT requirements, this includes DFT functional verification, DFT coverage verification and static timing analysis.
• Static Timing/Noise/Coupling Analysis for test modes at chip level.
• Generating clear documentation & easy to use scripts to support DFT flows.
• Evaluation of tools in the development of DFT flows.
• Responsible for day to day coordination of DFT design activity and resources, in meeting project schedules.
• work with ATE test engineers to debug production test patterns

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.