Chip Infrastructure Engineer

1 Month ago • 5 Years + • Research & Development

Job Summary

Job Description

As a Chip Infrastructure Engineer at Google Cloud, you'll plan and execute work in a fast-paced environment, focusing on infrastructure enabling design and verification teams to produce chips powering Google's computing. You'll work with architects, logic designers, and verification engineers to develop flows for building and verifying SoC chip designs. Collaboration with software, physical design, and validation teams ensures successful software integration and quality silicon delivery. Responsibilities include providing compute and storage needs for chip design teams, implementing tools and methodologies with ASIC teams, designing CAD tools and solutions, extending third-party tools, and providing documentation and training.
Must have:
  • Bachelor's degree in EE/CS or equivalent
  • 5+ years scripting experience (Unix Shell, Python)
  • Experience with version control (Git, Mercurial)
  • Cross-functional team experience for quality tape-outs
Good to have:
  • RTL team experience
  • Design verification techniques
  • Vendor solution evaluation
  • ASIC design, debug, and verification

Job Details


Minimum qualifications:

  • Bachelor’s degree in Electrical Engineering, Computer Science, or equivalent practical experience.
  • 5 years of experience in scripting languages (e.g., Unix Shell, Python) to build tools and flows.
  • Experience with software version control systems (e.g., Git, Mercurial), and concepts of branches, commits, and merges.
  • Experience working with cross-functional teams for quality tape-outs.

Preferred qualifications:

  • Experience working with Register-Transfer Level (RTL) teams and design integration methodologies that improve team productivity and velocity.
  • Experience with design verification techniques, including constrained-random simulation, formal property verification, or static verification.
  • Experience evaluating multiple vendor solutions and driving tool decisions/design improvements.
  • Experience with ASIC design, debug, and verification flows.

About the job

Google's custom-designed machines make up one of the largest and most powerful computing infrastructures in the world. The Hardware Testing Engineering team ensures that this cutting-edge equipment is reliable. In the R&D lab, you design test equipment for prototypes of our machinery and develop the protocols used to scale these tests for the entire global team. Working closely with design engineers, you give input on designs to improve our hardware until you're sure it meets Google's standards of quality and reliability.

As a Chip Infrastructure Engineer, you will plan and execute work in an innovative and fast-paced environment, with a focus on infrastructure that enables design and verification teams to produce the chips that power Google's computing needs. You'll be part of the chip infrastructure team responsible for compute, storage, common chip design components, and front-end tool flows.

In this role, you will work with architects, logic designers, and verification engineers to develop flows to build and verify SoC chip designs. You’ll also work closely with software, physical design, silicon bring-up and validation teams to enable a successful software integration, implementation, silicon bringup and deliver quality silicon.

The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Responsibilities

  • Work with partner teams to provide the compute, storage and methodology needs of the chip design, verification and physical design teams.
  • Collaborate with Application-Specific Integrated Circuit (ASIC) teams to implement tools and methodologies.
  • Design and implement CAD tools, solutions and methodologies for ASIC development.
  • Extend the capabilities of third-party tools through their dedicated APIs.
  • Provide documentation, training, and support to increase end user productivity.

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