Design Implementation Lead

5 Months ago • 8 Years + • Research & Development

Job Summary

Job Description

Lead the backend implementation of RISC-V cores and uncore blocks, focusing on performance, power, and area optimization. Strong experience in RISC-V architecture design and implementation, synthesis, place and route, CTS, and timing analysis is required.

Must have:

RISC-V Architecture
Backend Implementation
Synthesis & Routing
Timing Analysis

Good to have:

UPF-based Design
Power Optimization
Design Validation
Mentorship & Guidance

Perks:

Team Autonomy
Growth Opportunities

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Job Details

We are seeking an experienced Design Implementation Lead with 8+ years of experience to drive the backend implementation of RISC-V cores and uncore blocks. The candidate will lead all aspects of design implementation, focusing on Performance, Power, and Area (PPA) optimization while mentoring junior team members.

Key Responsibilities:

Backend Implementation of RISC-V Cores and Uncore Blocks:

Synthesis, Place and Route, Clock Tree Synthesis (CTS)

Mesh CTS

Static Timing Analysis and correlation between Fusion Compiler and STA tools

UPF-based Design Implementation

Power Analysis and Optimization

Design Testing: DFT, LBIST, MBIST

CDC, LINT techniques for design validation

Mentorship and Team Development:

Mentor junior team members, providing guidance to meet PPA targets and improve technical skills.

Design Methodology Leadership:

Drive the adoption of advanced design convergence methodologies and innovative solutions to enhance design efficiency and outcomes.

Minimum Qualifications:

Bachelor’s degree in Electrical or Computer Engineering with 7+ years of relevant experience or a Master’s degree with 5+ years of experience.
Strong experience in RISC-V, ARM, or MIPS-based CPU architecture design and implementation.
In-depth knowledge of synthesis, place and route, CTS, and timing analysis techniques.
Proficient in power analysis and UPF-based low-power design methodologies.

Why Join Us:

At MIPS, you’ll be part of a dynamic team leading the development of high-performance RISC-V processors. You will work with industry-leading CPU engineers, have a strong sense of autonomy, and enjoy a significant growth path with opportunities to make a meaningful impact. We offer competitive benefits, including medical, dental, vision, retirement savings, and paid leave.

About MIPS:

MIPS is a pioneer in RISC-based computing, having driven the development of faster, more power-efficient semiconductors for over three decades. Today, we are at the forefront of the RISC-V revolution, building high-performance heterogeneous computing solutions with our MIPS eVocore processors. Our deep engineering expertise and rich RISC heritage make us leaders in accelerating the deployment of RISC-V-based technologies for diverse industries.