We are seeking an experienced Design Implementation Lead with 8+ years of experience to drive the backend implementation of RISC-V cores and uncore blocks. The candidate will lead all aspects of design implementation, focusing on Performance, Power, and Area (PPA) optimization while mentoring junior team members.
Why Join Us:
At MIPS, you’ll be part of a dynamic team leading the development of high-performance RISC-V processors. You will work with industry-leading CPU engineers, have a strong sense of autonomy, and enjoy a significant growth path with opportunities to make a meaningful impact. We offer competitive benefits, including medical, dental, vision, retirement savings, and paid leave.
About MIPS:
MIPS is a pioneer in RISC-based computing, having driven the development of faster, more power-efficient semiconductors for over three decades. Today, we are at the forefront of the RISC-V revolution, building high-performance heterogeneous computing solutions with our MIPS eVocore processors. Our deep engineering expertise and rich RISC heritage make us leaders in accelerating the deployment of RISC-V-based technologies for diverse industries.