Silicon AI/ML Architect, TPU, Google Cloud

3 Months ago • 10 Years + • Research & Development

Job Summary

Job Description

This role involves designing and architecting AI/ML SoCs for Google's direct-to-consumer products. Responsibilities include developing architecture specifications, evaluating silicon solutions (off-the-shelf, custom, chiplets), collaborating with system and software teams for optimal hardware/software interfaces, and working with various stakeholders (design, verification, etc.) to ensure design completion and performance. The architect will also analyze power, performance, and area tradeoffs and drive improvements across generations. The position requires extensive experience in machine learning SoC architecture, ASIC design flows, and performance analysis for multi-chiplet architectures.
Must have:
  • 10+ years experience in ML/Graphics SoC architecture
  • 8+ years experience in performance/power/area tradeoff analysis
  • Experience with ASIC design flows (specification to production)
  • SoC architecture development & specification
  • Collaboration with system and software teams
Good to have:
  • Experience with RTL coding and integration flows
  • Proficiency in performance estimation and test plan definition
  • Proficiency in C++, Python, or Go
  • Knowledge of arithmetic units, bus architectures, accelerators, or memory hierarchies
  • Knowledge of high-performance and low-power design techniques

Job Details

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
  • 10 years of experience in architecture of machine learning or graphics SoCs.
  • 8 years of experience with performance, power, area, cost tradeoff analysis for multi chiplet SoC architectures.
  • Experience with ASIC design flows, from specification to production.

Preferred qualifications:

  • Experience in SoC designs, RTL coding and integration flows.
  • Experience working with software teams optimizing the hardware/software interface.
  • Proficiency in estimating performance by analysis and modeling, and skilled in defining and driving performance test plans.
  • Proficiency in a procedural programming language (e.g., C++, Python, Go).
  • Knowledge of arithmetic units, bus architectures, accelerators, or memory hierarchies.
  • Knowledge of high performance and low power design techniques.

About the job

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

As a Silicon AI/ML Architect, you will drive the Architecture of an AI/ML SoC and will support the engineering teams during the implementation and validation phases, pre-silicon, and post-silicon. You will work closely with internal system teams and external partners to develop a comprehensive understanding of the required SoC functions given its surrounding hardware, software, and the economic environments. You will also collaborate with the Engineering teams to drive the optimal balance between performance, features, power, schedule, and cost.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities

  • Develop SoC architecture and Architecture specifications that meet current and future computing requirements for AI/ML roadmap.
  • Evaluate different silicon solutions for executing Google’s data center AI accelerator roadmap: off-the-shelf components, vendor co-developments, custom designs, and chiplets.
  • Collaborate closely with Systems and Software teams to create high performance hardware/software interfaces.
  • Collaborate closely with design, verification, emulation, physical design, packaging, and silicon validation stakeholders to ensure that designs are complete, correct, and performant.
  • Evaluate power, performance, area tradeoffs and drive improvements across generations.

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