Network Design Engineer, Google Cloud
Job Summary
Job Description
- 10+ years ASIC architecture experience
- RDMA and packet processing expertise
- RTL development for ASIC subsystems
- Experience in micro-architecture, design, verification
- Performance analysis and test plan definition
- Hardware/software interface optimization
- Experience with networking switches and endpoints
- TCP/IP, Ethernet, PCIe, DRAM, NoC knowledge
- C++, Python, or Go programming
- Network simulation and modeling skills
5 skills required
Job Details
Minimum qualifications:
- Bachelor's degree in BSC, or a related field, or equivalent practical experience.
- 10 years of experience architecting networking ASICs from specification to production.
- Experience working with design networking like: RDMA and or packet processing and system design principles for low latency, high throughput, security, and reliability.
- Experience developing RTL for ASIC subsystems.
- Experience in Cross-functional, micro-architecture, design, verification, logic synthesis, and timing closure.
Preferred qualifications:
- Experience working with software teams optimizing the hardware/software interface.
- Experience architecting networking switches, end points, and hardware offloads.
- Experience in Transmission Control Protocol (TCP), IP, Ethernet, PCIE and Dynamic random-access memory (DRAM), Network on Chip (NoC) principles and protocols.
- Experience in a procedural programming language (e.g. C++, Python, Go.).
- Experience in estimating performance by analysis, modeling, and network simulation. Skilled in defining and driving performance test plans.
- Understanding of packet classification, processing, queueing, scheduling, switching, routing, traffic conditioning, and telemetry.
About the job
In this role, you will be part of a team developing Application-Specific Integrated Circuit (ASIC) used to accelerate networking in data centers. You will have dynamic, multi-faceted responsibilities in areas such as project definition, design, and implementation. You will participate in the design, architecture, documentation, and implementation of the next generation of data center accelerators.
You will be responsible for performance analysis for an end to end networking stack using your deep knowledge of RDMA based transports.
The ML, Systems & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
- Participate in evaluation of future ASIC designs and general architecture for executing Google’s data center networking roadmap: off-the-shelf components, vendor co-developments, custom designs, and chiplets.
- Collaborate in developing new layer protocols for data center networking.
- Understand how it interacts with software and other ASIC subsystems to implement groundbreaking data center networks.
- Define performance hardware/software interfaces. Write micro architecture and design specifications
- Define efficient micro-architecture and block partitioning/interfaces and flows
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About The Company
A problem isn't truly solved until it's solved for all. Googlers build products that help create opportunities for everyone, whether down the street or across the globe. Bring your insight, imagination and a healthy disregard for the impossible. Bring everything that makes you unique. Together, we can build for everyone.
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