Senior Mask Layout Engineer

3 Months ago • 5 Years + • Research & Development

Job Summary

Job Description

NVIDIA seeks a Senior Mask Layout Design Engineer to contribute to the design of high-speed mixed-signal circuits. Responsibilities include physical layout of mixed-signal functions (PLLs, high-speed memory I/O, SerDes, general I/O, ESD structures) using Cadence tools in advanced CMOS FinFET technologies. Collaboration with ASIC and mixed-signal engineers is crucial for design customization and integration. The role involves floor planning, custom layout, and verification against design rules and schematics using DRC and LVS tools like Dracula, Hercules, and Calibre. Proficiency in scripting languages (Perl, Python) is needed, along with expertise in DRC/LVS checking flows.
Must have:
  • 5+ years mask design/layout experience
  • Analog circuit layout expertise in submicron CMOS
  • Cadence virtuoso expertise
  • DRC/LVS experience (Dracula, Hercules, Calibre)
  • Proficiency in scripting languages (Perl, Python)

Job Details

We are looking for a Senior Mask Layout Design Engineer – someone who is excited to join a growing group of diverse individuals responsible for handling challenge high-speed mixed-signal circuit designs.

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence.

What you'll be doing:

  • Perform physical layout for mixed-signal functions like PLL's, high speed memory I/O circuits, SerDes, general I/O's, ESD structures designs in state-of-the-art sub-micron CMOS FinFET technologies using Cadence tools

  • Work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.

  • Job duties will include floor planning, custom layout and verifying against design rules and schematics.

What we need to see:

  • BSEE or equivalent experience

  • Minimum of 5 years of relevant mask design / layout experience

  • Proven understanding of analog circuit layout concepts in submicron CMOS technologies

  • Expertise in Cadence custom circuit design tools - particularly virtuoso

  • Experience running and debugging DRC and LVS with verification tools such as Dracula, Hercules, Calibre

  • Ability to communicate in spoken and written English

  • You are able to work effectively in a team, good interpersonal skills, enthusiasm and positive energy.

  • Proficiency in scripting languages like Perl, python, skill etc.

  • Knowledge of DRC and LVS checking flows, ability to customize DRC and LVS decks

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

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About The Company

Since its founding in 1993, NVIDIA (NASDAQ: NVDA) has been a pioneer in accelerated computing. The company’s invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined computer graphics, ignited the era of modern AI and is fueling the creation of the metaverse. NVIDIA is now a full-stack computing company with data-center-scale offerings that are reshaping industry.

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