Senior Staff CPU RTL Design Engineer

This Senior Staff CPU RTL Design Engineer role at Google involves developing custom silicon solutions for direct-to-consumer products. Responsibilities include participating in CPU subsystem development, designing microarchitecture and RTL for next-generation CPUs, proposing performance enhancements, and collaborating with software, architecture, and performance teams. The ideal candidate will have 10+ years of experience in digital logic design, RTL design (using Verilog or SystemVerilog), and related design processes (Lint, UPF). They will also work with the verification team to ensure design quality and collaborate with physical design and power teams to meet performance goals. The role requires familiarity with modern techniques and the ability to guide performance evaluation efforts. The position is based in New Taipei City, Taiwan.