A&MS Layout Design Engineer
Job Summary
Job Description
- Analog Mixed-signal
- Layout Verification
- Deep Submicron
- CMOS & FinFET
- High-speed SerDes
- ESD & Latch-up
- Floor-planning
- Routing
Job Details
About the job
- Experience in Analog Mixed-signal layout and verification , experience in high-speed SerDes IPs is a plus.
- Advanced understanding of Deep submicron effects and mitigation, Advanced tool usage, Floor-planning , Routing.
- Solid understanding of CMOS and FinFET layouts and process technology in 28nm and below.
- Good understanding of basic ESD and latch-up layout design considerations.
- Excellent written and verbal communication skills in interactions with internal development teams.
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About The Company
Smart, Secure Everything—From Silicon to Software
Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure.
Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at the forefront of Smart, Secure Everything with the world’s most advanced tools for silicon chip design, verification, IP integration, and application security testing. Our technology helps customers innovate from Silicon to Software, so they can deliver Smart, Secure Everything.
Since 1986, Synopsys has been at the heart of accelerating electronics innovation with engineers around the world having used Synopsys technology to successfully design and create billions of chips and systems that are found in the electronics that people rely on every day.
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