Silicon Logic Formal Verification

Positions are open for full-time and co-op/internship roles in the areas of formal verification of CPU, Fabric, and Accelerator design. In this position, you will work with architects and RTL design engineers to identify, specify, and verify artifacts amenable to formal analysis. You will prove functional and security properties of the design, find design bugs, and work closely with design teams to deliver high-quality designs. You will also develop sound formal abstract models for verifying system-level properties like deadlock freedom and non-starvation using formal methods. Additionally, you will develop innovative flows using formal methods in conjunction with simulation-based techniques for effective bug hunting and develop reusable and scalable proof techniques.