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Silicon Physical Design and Implementation Engineer

Silicon Physical Design and Implementation Engineer

1 Hour ago • 3 Years + • Research & Development

About the job

8 skills required for this role

Test your skills to join the top 1% applicants for this job

shell

unity

algorithms

data-structures

python

perl

innovation

cross-functional

Job Description

This role involves developing Application-Specific Integrated Circuit (ASIC) RTL2GDS implementation for high Power Performance Area (PPA) designs. Responsibilities include managing block and full-chip level physical implementation and QoR (power, timing, area), collaborating with cross-functional teams to improve PPAs in physical design, and contributing to the innovation behind Google's direct-to-consumer products. The ideal candidate will have a Bachelor's degree (Master's preferred) in a related field and 3+ years of experience with physical design methodology and flow validation/development. Proficiency in Place and Route (PnR) tools and scripting languages (Tcl/Perl/Shell/Python) is essential.

Must have:

Bachelor's degree in relevant field
3+ years physical design experience
PnR tools & scripting (Tcl/Perl/Shell/Python)
ASIC RTL2GDS implementation
QoR management (power, timing, area)

Good to have:

Master's degree in EE/CE/CS
Circuit design understanding
Deep submicron technology knowledge
Verilog/SystemVerilog knowledge

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Minimum qualifications:

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
3 years of experience with physical design methodology and flow validation/development methodology.
Experience in floor planning and physical design tool automation with Place and Route (PnR) tools and scripting in Tcl/Perl/Shell/Python.

Preferred qualifications:

Master's degree in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Understanding of circuit design, device physics and deep submicron technology.
Understanding of algorithms and data structures.
Knowledge of Verilog/SystemVerilog.

About the job

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

Develop all aspects of Application-Specific Integrated Circuit (ASIC) RTL2GDS implementation for high Power Performance Area (PPA) designs.
Manage block and full-chip level physical implementation and QoR (power, timing, area).
Collaborate with cross-functional teams to improve PPAs in physical design.

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About The Company

Google

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A problem isn't truly solved until it's solved for all. Googlers build products that help create opportunities for everyone, whether down the street or across the globe. Bring your insight, imagination and a healthy disregard for the impossible. Bring everything that makes you unique. Together, we can build for everyone.