Analog Design Verification Intern - PhD

1 Month ago • All levels

About the job

SummaryBy Outscal

Marvell seeks a PhD in Computer/Electrical Engineering with expertise in analog circuit design and simulation. You'll be responsible for creating Verilog/SystemVerilog behavioral models, running AMS simulations, and validating analog circuits. Experience with CMOS analog circuits, Verilog/SystemVerilog, Cadence Virtuoso, and AMS simulation is required. Basic scripting skills in Python are a plus.

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

The Optical PHY (CE-OPHY) team designs ultra high-speed and optical transceivers for communication infrastructure in long-haul, metro and datacenter. We address the bandwidth, capacity and power issues faced by cloud computing, mega data centers that powers the social media giant platforms. Our innovative approaches have resulted in the company’s products being first to market in many of key areas, developing the most advanced chips and subsystems solutions to address the ever-increasing demand of higher data rates driven by video-on demand, gaming and other real time data streams. We are seeking talented individuals to work on solving technical challenges with the most outstanding group of collaborators in the industry. Join our team of experts and make a difference in an exciting career opportunity.

What You Can Expect

- Creating Verilog/SystemVerilog behavioral models of analog circuits.

- Running AMS simulations to verify functionality of analog circuits.

What We're Looking For

PhD in Computer/Electrical Engineering in the field of Analog Design/Simulation

Solid knowledge in the followings:

- Good understanding of CMOS analog circuit.

- Capable of modeling functional behavior of analog circuit using Verilog/SystemVerilog.

- Familiar with EDA tools, such as Cadence Virtuoso.

- Capable of running AMS simulation to verify analog circuit.

- Basic scripting language skills, such Python.

Expected Base Pay Range (USD)

28 - 54, $ per hour.

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements 

For Internship roles, we are proud to offer the following benefits package during the internship - medical, dental and vision coverage or opt-out credit, perks and discount programs, virtual fitness subsidy, wellness & mental health support including coaching and therapy, paid holidays, paid volunteer days and paid sick time. Additional compensation maybe available for intern PhD candidates.

This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

#LI-SC1
$28.0K - $54.0K/yr (Outscal est.)
$41.0K/yr avg.
Irvine, California, United States

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