CPU RTL Front End Designer
Job Summary
Job Description
This role involves contributing to the frontend design of CPUs, focusing on microarchitecture and RTL design for next-generation CPUs. Responsibilities include proposing performance-enhancing microarchitecture features, collaborating with architects and performance teams on trade-off studies, communicating design pros and cons, and delivering designs meeting power, performance, and area (PPA) goals. The ideal candidate will be proficient in Verilog or SystemVerilog, have experience with microprocessor architecture, and possess strong communication and collaboration skills. Working closely with verification and physical design teams to ensure high-quality designs is also crucial.
Must have:
- RTL design in Verilog/SystemVerilog
- Microprocessor architecture experience
- Digital logic design principles
- PPA goal delivery
- Collaboration with verification and physical design teams
Good to have:
- Master's or PhD in relevant field
- Modern processor microarchitecture knowledge
- C, C++, Python programming skills
- Linux/Android OS knowledge
Perks:
- Bonus
- Equity
- Benefits
5 skills required
Job Details
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.
- 3 years of experience microprocessor architecture.
- Experience with logic design through coursework.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience with modern processor microarchitecture and related technologies and algorithms, through academic projects or industry experience
- Knowledge of Programming languages such as C, C++, and Python
- Knowledge of general purpose operating systems such as Linux or Android
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The US base salary range for this full-time position is $132,000-$189,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about .
Responsibilities
- Contribute to CPU frontend designs, with emphasis on microarchitecture and RTL design for the next generation CPU.
- Propose performance enhancing microarchitecture features with efficiency in mind. Work with architects and performance teams for trade-off studies. Communicate pros and cons of microarchitecture enhancements. Facilitate final decision making.
- Deliver designs meeting Power, performance and area (PPA) goals with production quality.
- Become familiar with techniques for at least one processor functional block. Interpret the techniques into design constructs and languages in order to provide guidance to and participate in the performance modeling effort.
- Work closely with the functional verification team to ensure production quality designs, and with the physical design team to meet frequency, power, and area goals.
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