ML Accelerator Architect and Performance Engineer, Silicon

1 Hour ago • 5 Years + • Research & Development

Job Summary

Job Description

This role involves developing custom silicon solutions for Google's direct-to-consumer products. As an ML Accelerator Architect and Performance Engineer, you'll focus on exploring future hardware and software architectures for efficient on-device machine learning applications. This includes hardware architecture exploration, contributing to compiler, runtime, and API strategies, and collaborating with research teams, system architecture teams, and compiler engineers to optimize workloads. Responsibilities include driving hardware architecture exploration, initiating feature modeling in architecture simulators, optimizing performance, collaborating with researchers and application developers, enhancing user experiences by partitioning ML workloads, and engaging with other Google engineers and researchers.
Must have:
  • Bachelor's degree in relevant field
  • 5+ years experience in computer/chip architecture
  • Proficiency in C/C++ or Python and deep learning frameworks
  • Hardware architecture exploration
  • Collaboration with research and engineering teams
Good to have:
  • Master's or PhD degree
  • Hardware/software co-design for ML
  • Simulator development and micro-architecture experience
  • Distributed/parallel programming experience
  • Experience with domain-specific accelerators

Job Details


Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Science, Image Processing, or equivalent practical experience.
  • 5 years of relevant work or academic research experience in computer or chip architecture, performance, and/or compiler.
  • Experience with one or more general purpose programming languages including (but not limited to) C/C++ or Python and deep learning frameworks like TensorFlow/Jax/Pytorch.

Preferred qualifications:

  • Master or PhD degree in Computer Science, Electrical Engineering or related field, or equivalent practical experience.
  • Experience with hardware/software co-design for Machine Learning (ML).
  • Experience with simulator development and micro-architecture.
  • Experience with distributed/parallel programming.
  • Experience with domain-specific accelerators.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

In this role, you will focus on exploring future hardware and software architecture to efficiently enable on-device machine learning applications. Using your expertise in neural network models, hardware architecture, compilers, and software stacks, you will drive hardware architecture exploration, and also contribute to compiler, runtime, and API strategies, as well as other innovations.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

  • Drive hardware architecture exploration while collaborating with research teams, system architecture teams, and compiler engineers to optimize future workloads from both software and hardware perspectives.
  • Initiate new feature modeling in the architecture simulator and optimize the performance by collaborating with researchers and application developers to enable the latest machine learning work.
  • Enhance user experiences by working collaboratively with full stack software engineers to partition machine learning workload to selected compute engines.
  • Engage with and learn from talented researchers and engineers across Google.

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